1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
|
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1010 -verify-machineinstrs < %s | FileCheck %s
; LDS is allocated per-kernel. Module scope variables are gathered into a struct which is
; allocated at address zero, if used by the kernel. Kernel scope variables are gathered into
; a per-kernel struct and allocated immediately after the module scope.
; This test checks that the module and kernel scope variables are allocated in deterministic
; order without spurious alignment padding between the two
; External LDS is checked because it influences LDS padding in general and because it will
; not be moved into either module or kernel struct
@module_variable = addrspace(3) global i16 undef
; Variables are allocated into module scope block when used by a non-kernel function
define void @use_module() #0 {
; CHECK-LABEL: use_module:
; CHECK: ; %bb.0:
; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; CHECK-NEXT: s_waitcnt_vscnt null, 0x0
; CHECK-NEXT: v_mov_b32_e32 v0, 0
; CHECK-NEXT: ds_write_b16 v0, v0
; CHECK-NEXT: s_waitcnt lgkmcnt(0)
; CHECK-NEXT: s_setpc_b64 s[30:31]
store i16 0, ptr addrspace(3) @module_variable
ret void
}
; Variables only used by kernels are specialised and allocated per-kernel
@kernel_normal = addrspace(3) global i16 undef
@kernel_overalign = addrspace(3) global i16 undef, align 4
; External LDS shall not introduce padding between module and kernel scope variables
@extern_normal = external addrspace(3) global [0 x float]
@extern_overalign = external addrspace(3) global [0 x float], align 8
; 2^3 cases encoded into function names
define amdgpu_kernel void @module_0_kernel_normal_extern_normal(i32 %idx) #1 {
; CHECK-LABEL: module_0_kernel_normal_extern_normal:
; CHECK: ; %bb.0:
; CHECK-NEXT: s_load_dword s0, s[4:5], 0x0
; CHECK-NEXT: v_mov_b32_e32 v0, 0
; CHECK-NEXT: v_mov_b32_e32 v1, 2
; CHECK-NEXT: s_waitcnt lgkmcnt(0)
; CHECK-NEXT: s_lshl_b32 s0, s0, 2
; CHECK-NEXT: s_add_i32 s0, s0, 4
; CHECK-NEXT: v_mov_b32_e32 v2, s0
; CHECK-NEXT: ds_write_b16 v0, v1
; CHECK-NEXT: ds_write_b32 v2, v0
; CHECK-NEXT: s_endpgm
store i16 2, ptr addrspace(3) @kernel_normal
%arrayidx1 = getelementptr inbounds [0 x float], ptr addrspace(3) @extern_normal, i32 0, i32 %idx
store float 0.0, ptr addrspace(3) %arrayidx1
ret void
}
define amdgpu_kernel void @module_1_kernel_normal_extern_normal(i32 %idx) {
; CHECK-LABEL: module_1_kernel_normal_extern_normal:
; CHECK: ; %bb.0:
; CHECK-NEXT: s_add_u32 s8, s8, s11
; CHECK-NEXT: s_mov_b32 s32, 0
; CHECK-NEXT: s_addc_u32 s9, s9, 0
; CHECK-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_LO), s8
; CHECK-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_HI), s9
; CHECK-NEXT: s_add_u32 s0, s0, s11
; CHECK-NEXT: s_addc_u32 s1, s1, 0
; CHECK-NEXT: s_getpc_b64 s[8:9]
; CHECK-NEXT: s_add_u32 s8, s8, use_module@gotpcrel32@lo+4
; CHECK-NEXT: s_addc_u32 s9, s9, use_module@gotpcrel32@hi+12
; CHECK-NEXT: s_load_dwordx2 s[10:11], s[8:9], 0x0
; CHECK-NEXT: s_load_dword s12, s[6:7], 0x0
; CHECK-NEXT: s_mov_b64 s[6:7], s[4:5]
; CHECK-NEXT: s_waitcnt lgkmcnt(0)
; CHECK-NEXT: s_swappc_b64 s[30:31], s[10:11]
; CHECK-NEXT: s_lshl_b32 s4, s12, 2
; CHECK-NEXT: v_mov_b32_e32 v0, 0
; CHECK-NEXT: v_mov_b32_e32 v1, 1
; CHECK-NEXT: s_add_i32 s4, s4, 4
; CHECK-NEXT: v_mov_b32_e32 v2, 2
; CHECK-NEXT: v_mov_b32_e32 v3, s4
; CHECK-NEXT: ds_write_b16 v0, v1
; CHECK-NEXT: ds_write_b16 v0, v2 offset:2
; CHECK-NEXT: ds_write_b32 v3, v0
; CHECK-NEXT: s_endpgm
call void @use_module()
store i16 1, ptr addrspace(3) @module_variable
store i16 2, ptr addrspace(3) @kernel_normal
%arrayidx1 = getelementptr inbounds [0 x float], ptr addrspace(3) @extern_normal, i32 0, i32 %idx
store float 0.0, ptr addrspace(3) %arrayidx1
ret void
}
define amdgpu_kernel void @module_0_kernel_overalign_extern_normal(i32 %idx) #1 {
; CHECK-LABEL: module_0_kernel_overalign_extern_normal:
; CHECK: ; %bb.0:
; CHECK-NEXT: s_load_dword s0, s[4:5], 0x0
; CHECK-NEXT: v_mov_b32_e32 v0, 0
; CHECK-NEXT: v_mov_b32_e32 v1, 2
; CHECK-NEXT: s_waitcnt lgkmcnt(0)
; CHECK-NEXT: s_lshl_b32 s0, s0, 2
; CHECK-NEXT: s_add_i32 s0, s0, 4
; CHECK-NEXT: v_mov_b32_e32 v2, s0
; CHECK-NEXT: ds_write_b16 v0, v1
; CHECK-NEXT: ds_write_b32 v2, v0
; CHECK-NEXT: s_endpgm
store i16 2, ptr addrspace(3) @kernel_overalign
%arrayidx1 = getelementptr inbounds [0 x float], ptr addrspace(3) @extern_normal, i32 0, i32 %idx
store float 0.0, ptr addrspace(3) %arrayidx1
ret void
}
define amdgpu_kernel void @module_1_kernel_overalign_extern_normal(i32 %idx) {
; CHECK-LABEL: module_1_kernel_overalign_extern_normal:
; CHECK: ; %bb.0:
; CHECK-NEXT: s_add_u32 s8, s8, s11
; CHECK-NEXT: s_mov_b32 s32, 0
; CHECK-NEXT: s_addc_u32 s9, s9, 0
; CHECK-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_LO), s8
; CHECK-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_HI), s9
; CHECK-NEXT: s_add_u32 s0, s0, s11
; CHECK-NEXT: s_addc_u32 s1, s1, 0
; CHECK-NEXT: s_getpc_b64 s[8:9]
; CHECK-NEXT: s_add_u32 s8, s8, use_module@gotpcrel32@lo+4
; CHECK-NEXT: s_addc_u32 s9, s9, use_module@gotpcrel32@hi+12
; CHECK-NEXT: s_load_dwordx2 s[10:11], s[8:9], 0x0
; CHECK-NEXT: s_load_dword s12, s[6:7], 0x0
; CHECK-NEXT: s_mov_b64 s[6:7], s[4:5]
; CHECK-NEXT: s_waitcnt lgkmcnt(0)
; CHECK-NEXT: s_swappc_b64 s[30:31], s[10:11]
; CHECK-NEXT: s_lshl_b32 s4, s12, 2
; CHECK-NEXT: v_mov_b32_e32 v0, 0
; CHECK-NEXT: v_mov_b32_e32 v1, 1
; CHECK-NEXT: s_add_i32 s4, s4, 8
; CHECK-NEXT: v_mov_b32_e32 v2, 2
; CHECK-NEXT: v_mov_b32_e32 v3, s4
; CHECK-NEXT: ds_write_b16 v0, v1
; CHECK-NEXT: ds_write_b16 v0, v2 offset:4
; CHECK-NEXT: ds_write_b32 v3, v0
; CHECK-NEXT: s_endpgm
call void @use_module()
store i16 1, ptr addrspace(3) @module_variable
store i16 2, ptr addrspace(3) @kernel_overalign
%arrayidx1 = getelementptr inbounds [0 x float], ptr addrspace(3) @extern_normal, i32 0, i32 %idx
store float 0.0, ptr addrspace(3) %arrayidx1
ret void
}
define amdgpu_kernel void @module_0_kernel_normal_extern_overalign(i32 %idx) #1 {
; CHECK-LABEL: module_0_kernel_normal_extern_overalign:
; CHECK: ; %bb.0:
; CHECK-NEXT: s_load_dword s0, s[4:5], 0x0
; CHECK-NEXT: v_mov_b32_e32 v0, 0
; CHECK-NEXT: v_mov_b32_e32 v1, 2
; CHECK-NEXT: s_waitcnt lgkmcnt(0)
; CHECK-NEXT: s_lshl_b32 s0, s0, 2
; CHECK-NEXT: s_add_i32 s0, s0, 8
; CHECK-NEXT: v_mov_b32_e32 v2, s0
; CHECK-NEXT: ds_write_b16 v0, v1
; CHECK-NEXT: ds_write_b32 v2, v0
; CHECK-NEXT: s_endpgm
store i16 2, ptr addrspace(3) @kernel_normal
%arrayidx1 = getelementptr inbounds [0 x float], ptr addrspace(3) @extern_overalign, i32 0, i32 %idx
store float 0.0, ptr addrspace(3) %arrayidx1
ret void
}
define amdgpu_kernel void @module_1_kernel_normal_extern_overalign(i32 %idx) {
; CHECK-LABEL: module_1_kernel_normal_extern_overalign:
; CHECK: ; %bb.0:
; CHECK-NEXT: s_add_u32 s8, s8, s11
; CHECK-NEXT: s_mov_b32 s32, 0
; CHECK-NEXT: s_addc_u32 s9, s9, 0
; CHECK-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_LO), s8
; CHECK-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_HI), s9
; CHECK-NEXT: s_add_u32 s0, s0, s11
; CHECK-NEXT: s_addc_u32 s1, s1, 0
; CHECK-NEXT: s_getpc_b64 s[8:9]
; CHECK-NEXT: s_add_u32 s8, s8, use_module@gotpcrel32@lo+4
; CHECK-NEXT: s_addc_u32 s9, s9, use_module@gotpcrel32@hi+12
; CHECK-NEXT: s_load_dwordx2 s[10:11], s[8:9], 0x0
; CHECK-NEXT: s_load_dword s12, s[6:7], 0x0
; CHECK-NEXT: s_mov_b64 s[6:7], s[4:5]
; CHECK-NEXT: s_waitcnt lgkmcnt(0)
; CHECK-NEXT: s_swappc_b64 s[30:31], s[10:11]
; CHECK-NEXT: s_lshl_b32 s4, s12, 2
; CHECK-NEXT: v_mov_b32_e32 v0, 0
; CHECK-NEXT: v_mov_b32_e32 v1, 1
; CHECK-NEXT: s_add_i32 s4, s4, 8
; CHECK-NEXT: v_mov_b32_e32 v2, 2
; CHECK-NEXT: v_mov_b32_e32 v3, s4
; CHECK-NEXT: ds_write_b16 v0, v1
; CHECK-NEXT: ds_write_b16 v0, v2 offset:2
; CHECK-NEXT: ds_write_b32 v3, v0
; CHECK-NEXT: s_endpgm
call void @use_module()
store i16 1, ptr addrspace(3) @module_variable
store i16 2, ptr addrspace(3) @kernel_normal
%arrayidx1 = getelementptr inbounds [0 x float], ptr addrspace(3) @extern_overalign, i32 0, i32 %idx
store float 0.0, ptr addrspace(3) %arrayidx1
ret void
}
define amdgpu_kernel void @module_0_kernel_overalign_extern_overalign(i32 %idx) #1 {
; CHECK-LABEL: module_0_kernel_overalign_extern_overalign:
; CHECK: ; %bb.0:
; CHECK-NEXT: s_load_dword s0, s[4:5], 0x0
; CHECK-NEXT: v_mov_b32_e32 v0, 0
; CHECK-NEXT: v_mov_b32_e32 v1, 2
; CHECK-NEXT: s_waitcnt lgkmcnt(0)
; CHECK-NEXT: s_lshl_b32 s0, s0, 2
; CHECK-NEXT: s_add_i32 s0, s0, 8
; CHECK-NEXT: v_mov_b32_e32 v2, s0
; CHECK-NEXT: ds_write_b16 v0, v1
; CHECK-NEXT: ds_write_b32 v2, v0
; CHECK-NEXT: s_endpgm
store i16 2, ptr addrspace(3) @kernel_overalign
%arrayidx1 = getelementptr inbounds [0 x float], ptr addrspace(3) @extern_overalign, i32 0, i32 %idx
store float 0.0, ptr addrspace(3) %arrayidx1
ret void
}
define amdgpu_kernel void @module_1_kernel_overalign_extern_overalign(i32 %idx) {
; CHECK-LABEL: module_1_kernel_overalign_extern_overalign:
; CHECK: ; %bb.0:
; CHECK-NEXT: s_add_u32 s8, s8, s11
; CHECK-NEXT: s_mov_b32 s32, 0
; CHECK-NEXT: s_addc_u32 s9, s9, 0
; CHECK-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_LO), s8
; CHECK-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_HI), s9
; CHECK-NEXT: s_add_u32 s0, s0, s11
; CHECK-NEXT: s_addc_u32 s1, s1, 0
; CHECK-NEXT: s_getpc_b64 s[8:9]
; CHECK-NEXT: s_add_u32 s8, s8, use_module@gotpcrel32@lo+4
; CHECK-NEXT: s_addc_u32 s9, s9, use_module@gotpcrel32@hi+12
; CHECK-NEXT: s_load_dwordx2 s[10:11], s[8:9], 0x0
; CHECK-NEXT: s_load_dword s12, s[6:7], 0x0
; CHECK-NEXT: s_mov_b64 s[6:7], s[4:5]
; CHECK-NEXT: s_waitcnt lgkmcnt(0)
; CHECK-NEXT: s_swappc_b64 s[30:31], s[10:11]
; CHECK-NEXT: s_lshl_b32 s4, s12, 2
; CHECK-NEXT: v_mov_b32_e32 v0, 0
; CHECK-NEXT: v_mov_b32_e32 v1, 1
; CHECK-NEXT: s_add_i32 s4, s4, 8
; CHECK-NEXT: v_mov_b32_e32 v2, 2
; CHECK-NEXT: v_mov_b32_e32 v3, s4
; CHECK-NEXT: ds_write_b16 v0, v1
; CHECK-NEXT: ds_write_b16 v0, v2 offset:4
; CHECK-NEXT: ds_write_b32 v3, v0
; CHECK-NEXT: s_endpgm
call void @use_module()
store i16 1, ptr addrspace(3) @module_variable
store i16 2, ptr addrspace(3) @kernel_overalign
%arrayidx1 = getelementptr inbounds [0 x float], ptr addrspace(3) @extern_overalign, i32 0, i32 %idx
store float 0.0, ptr addrspace(3) %arrayidx1
ret void
}
attributes #0 = { noinline }
attributes #1 = { "amdgpu-elide-module-lds" }
|
