File: vect-no-tfrs.ll

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llvm-toolchain-16 1%3A16.0.6-15~deb12u1
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; RUN: llc -march=hexagon < %s | FileCheck %s
; CHECK-NOT: r1:0 = combine(r1, r0)

define <4 x i8> @t_i4x8(<4 x i8> %a, <4 x i8> %b) nounwind {
entry:
	%0 = mul <4 x i8> %a, %b
	ret <4 x i8> %0
}