1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
|
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc --mtriple=loongarch32 --mattr=+f,+d --target-abi=ilp32d --verify-machineinstrs < %s \
; RUN: | FileCheck --check-prefix=LA32 %s
; RUN: llc --mtriple=loongarch64 --mattr=+f,+d --target-abi=lp64d --verify-machineinstrs < %s \
; RUN: | FileCheck --check-prefix=LA64 %s
;; These test that we can use architectural names ($f[0-9]*) refer to registers in
;; inline asm constraint lists. In each case, the named register should be used
;; for the source register of the `fabs.d`. It is very likely that `$fa0` will
;; be chosen as the designation register, but this is left to the compiler to
;; choose.
;;
;; Parenthesised registers in comments are the other aliases for this register.
define double @register_f0(double %a) nounwind {
; LA32-LABEL: register_f0:
; LA32: # %bb.0:
; LA32-NEXT: #APP
; LA32-NEXT: fabs.d $fa0, $fa0
; LA32-NEXT: #NO_APP
; LA32-NEXT: ret
;
; LA64-LABEL: register_f0:
; LA64: # %bb.0:
; LA64-NEXT: #APP
; LA64-NEXT: fabs.d $fa0, $fa0
; LA64-NEXT: #NO_APP
; LA64-NEXT: ret
%1 = tail call double asm "fabs.d $0, $1", "=f,{$f0}"(double %a)
ret double %1
}
;; NOTE: This test uses `$f24` (`$fs0`) as an input, so it should be saved.
define double @register_f24(double %a) nounwind {
; LA32-LABEL: register_f24:
; LA32: # %bb.0:
; LA32-NEXT: addi.w $sp, $sp, -16
; LA32-NEXT: fst.d $fs0, $sp, 8 # 8-byte Folded Spill
; LA32-NEXT: fmov.d $fs0, $fa0
; LA32-NEXT: #APP
; LA32-NEXT: fabs.d $fa0, $fs0
; LA32-NEXT: #NO_APP
; LA32-NEXT: fld.d $fs0, $sp, 8 # 8-byte Folded Reload
; LA32-NEXT: addi.w $sp, $sp, 16
; LA32-NEXT: ret
;
; LA64-LABEL: register_f24:
; LA64: # %bb.0:
; LA64-NEXT: addi.d $sp, $sp, -16
; LA64-NEXT: fst.d $fs0, $sp, 8 # 8-byte Folded Spill
; LA64-NEXT: fmov.d $fs0, $fa0
; LA64-NEXT: #APP
; LA64-NEXT: fabs.d $fa0, $fs0
; LA64-NEXT: #NO_APP
; LA64-NEXT: fld.d $fs0, $sp, 8 # 8-byte Folded Reload
; LA64-NEXT: addi.d $sp, $sp, 16
; LA64-NEXT: ret
%1 = tail call double asm "fabs.d $0, $1", "=f,{$f24}"(double %a)
ret double %1
}
;; NOTE: This test uses `$f31` (`$fs7`) as an input, so it should be saved.
define double @register_f31(double %a) nounwind {
; LA32-LABEL: register_f31:
; LA32: # %bb.0:
; LA32-NEXT: addi.w $sp, $sp, -16
; LA32-NEXT: fst.d $fs7, $sp, 8 # 8-byte Folded Spill
; LA32-NEXT: fmov.d $fs7, $fa0
; LA32-NEXT: #APP
; LA32-NEXT: fabs.d $fa0, $fs7
; LA32-NEXT: #NO_APP
; LA32-NEXT: fld.d $fs7, $sp, 8 # 8-byte Folded Reload
; LA32-NEXT: addi.w $sp, $sp, 16
; LA32-NEXT: ret
;
; LA64-LABEL: register_f31:
; LA64: # %bb.0:
; LA64-NEXT: addi.d $sp, $sp, -16
; LA64-NEXT: fst.d $fs7, $sp, 8 # 8-byte Folded Spill
; LA64-NEXT: fmov.d $fs7, $fa0
; LA64-NEXT: #APP
; LA64-NEXT: fabs.d $fa0, $fs7
; LA64-NEXT: #NO_APP
; LA64-NEXT: fld.d $fs7, $sp, 8 # 8-byte Folded Reload
; LA64-NEXT: addi.d $sp, $sp, 16
; LA64-NEXT: ret
%1 = tail call double asm "fabs.d $0, $1", "=f,{$f31}"(double %a)
ret double %1
}
|
