File: builtins-ppc-xlcompat-LoadReserve-StoreCond.ll

package info (click to toggle)
llvm-toolchain-16 1%3A16.0.6-15~deb12u1
  • links: PTS, VCS
  • area: main
  • in suites: bookworm
  • size: 1,634,792 kB
  • sloc: cpp: 6,179,261; ansic: 1,216,205; asm: 741,319; python: 196,614; objc: 75,325; f90: 49,640; lisp: 32,396; pascal: 12,286; sh: 9,394; perl: 7,442; ml: 5,494; awk: 3,523; makefile: 2,723; javascript: 1,206; xml: 886; fortran: 581; cs: 573
file content (138 lines) | stat: -rw-r--r-- 4,290 bytes parent folder | download | duplicates (5)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-64
; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-64
; RUN: llc -verify-machineinstrs -mtriple=powerpc-unknown-aix \
; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-32
; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-aix \
; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-64

declare i32 @llvm.ppc.lwarx(ptr)
define dso_local signext i32 @test_lwarx(ptr readnone %a) {
; CHECK-64-LABEL: test_lwarx:
; CHECK-64:       # %bb.0: # %entry
; CHECK-64-NEXT:    #APP
; CHECK-64-NEXT:    lwarx 3, 0, 3
; CHECK-64-NEXT:    #NO_APP
; CHECK-64-NEXT:    extsw 3, 3
; CHECK-64-NEXT:    blr
;
; CHECK-32-LABEL: test_lwarx:
; CHECK-32:       # %bb.0: # %entry
; CHECK-32-NEXT:    #APP
; CHECK-32-NEXT:    lwarx 3, 0, 3
; CHECK-32-NEXT:    #NO_APP
; CHECK-32-NEXT:    blr
entry:
  %0 = call i32 asm sideeffect "lwarx $0, ${1:y}", "=r,*Z,~{memory}"(ptr elementtype(i32) %a)
  ret i32 %0
}

declare i32 @llvm.ppc.stwcx(ptr, i32)
define dso_local signext i32 @test_stwcx(ptr %a, i32 signext %b) {
; CHECK-64-LABEL: test_stwcx:
; CHECK-64:       # %bb.0: # %entry
; CHECK-64-NEXT:    stwcx. 4, 0, 3
; CHECK-64-NEXT:    mfocrf 3, 128
; CHECK-64-NEXT:    srwi 3, 3, 28
; CHECK-64-NEXT:    extsw 3, 3
; CHECK-64-NEXT:    blr
;
; CHECK-32-LABEL: test_stwcx:
; CHECK-32:       # %bb.0: # %entry
; CHECK-32-NEXT:    stwcx. 4, 0, 3
; CHECK-32-NEXT:    mfocrf 3, 128
; CHECK-32-NEXT:    srwi 3, 3, 28
; CHECK-32-NEXT:    blr
entry:
  %0 = tail call i32 @llvm.ppc.stwcx(ptr %a, i32 %b)
  ret i32 %0
}

declare i32 @llvm.ppc.sthcx(ptr, i32)
define dso_local signext i32 @test_sthcx(ptr %a, i16 signext %val) {
; CHECK-64-LABEL: test_sthcx:
; CHECK-64:       # %bb.0: # %entry
; CHECK-64-NEXT:    sthcx. 4, 0, 3
; CHECK-64-NEXT:    mfocrf 3, 128
; CHECK-64-NEXT:    srwi 3, 3, 28
; CHECK-64-NEXT:    extsw 3, 3
; CHECK-64-NEXT:    blr
;
; CHECK-32-LABEL: test_sthcx:
; CHECK-32:       # %bb.0: # %entry
; CHECK-32-NEXT:    sthcx. 4, 0, 3
; CHECK-32-NEXT:    mfocrf 3, 128
; CHECK-32-NEXT:    srwi 3, 3, 28
; CHECK-32-NEXT:    blr
entry:
  %0 = sext i16 %val to i32
  %1 = tail call i32 @llvm.ppc.sthcx(ptr %a, i32 %0)
  ret i32 %1
}

declare i32 @llvm.ppc.stbcx(ptr, i32)
define signext i32 @test_stbcx(ptr %addr, i8 signext %val) {
; CHECK-64-LABEL: test_stbcx:
; CHECK-64:       # %bb.0: # %entry
; CHECK-64-NEXT:    stbcx. 4, 0, 3
; CHECK-64-NEXT:    mfocrf 3, 128
; CHECK-64-NEXT:    srwi 3, 3, 28
; CHECK-64-NEXT:    extsw 3, 3
; CHECK-64-NEXT:    blr
;
; CHECK-32-LABEL: test_stbcx:
; CHECK-32:       # %bb.0: # %entry
; CHECK-32-NEXT:    stbcx. 4, 0, 3
; CHECK-32-NEXT:    mfocrf 3, 128
; CHECK-32-NEXT:    srwi 3, 3, 28
; CHECK-32-NEXT:    blr
entry:
  %conv = sext i8 %val to i32
  %0 = tail call i32 @llvm.ppc.stbcx(ptr %addr, i32 %conv)
  ret i32 %0
}

define dso_local signext i16 @test_lharx(ptr %a) {
; CHECK-64-LABEL: test_lharx:
; CHECK-64:       # %bb.0: # %entry
; CHECK-64-NEXT:    #APP
; CHECK-64-NEXT:    lharx 3, 0, 3
; CHECK-64-NEXT:    #NO_APP
; CHECK-64-NEXT:    extsh 3, 3
; CHECK-64-NEXT:    blr
;
; CHECK-32-LABEL: test_lharx:
; CHECK-32:       # %bb.0: # %entry
; CHECK-32-NEXT:    #APP
; CHECK-32-NEXT:    lharx 3, 0, 3
; CHECK-32-NEXT:    #NO_APP
; CHECK-32-NEXT:    extsh 3, 3
; CHECK-32-NEXT:    blr
entry:
  %0 = tail call i16 asm sideeffect "lharx $0, ${1:y}", "=r,*Z,~{memory}"(ptr elementtype(i16) %a)
  ret i16 %0
}

; Function Attrs: nounwind uwtable
define dso_local zeroext i8 @test_lbarx(ptr %a) {
; CHECK-64-LABEL: test_lbarx:
; CHECK-64:       # %bb.0: # %entry
; CHECK-64-NEXT:    #APP
; CHECK-64-NEXT:    lbarx 3, 0, 3
; CHECK-64-NEXT:    #NO_APP
; CHECK-64-NEXT:    clrldi 3, 3, 56
; CHECK-64-NEXT:    blr
;
; CHECK-32-LABEL: test_lbarx:
; CHECK-32:       # %bb.0: # %entry
; CHECK-32-NEXT:    #APP
; CHECK-32-NEXT:    lbarx 3, 0, 3
; CHECK-32-NEXT:    #NO_APP
; CHECK-32-NEXT:    clrlwi 3, 3, 24
; CHECK-32-NEXT:    blr
entry:
  %0 = tail call i8 asm sideeffect "lbarx $0, ${1:y}", "=r,*Z,~{memory}"(ptr elementtype(i8) %a)
  ret i8 %0
}