File: coalesce-ext.ll

package info (click to toggle)
llvm-toolchain-16 1%3A16.0.6-15~deb12u1
  • links: PTS, VCS
  • area: main
  • in suites: bookworm
  • size: 1,634,792 kB
  • sloc: cpp: 6,179,261; ansic: 1,216,205; asm: 741,319; python: 196,614; objc: 75,325; f90: 49,640; lisp: 32,396; pascal: 12,286; sh: 9,394; perl: 7,442; ml: 5,494; awk: 3,523; makefile: 2,723; javascript: 1,206; xml: 886; fortran: 581; cs: 573
file content (18 lines) | stat: -rw-r--r-- 688 bytes parent folder | download | duplicates (12) 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
 
; RUN: llc -verify-machineinstrs -mcpu=g5 -mtriple=powerpc64-unknown-linux-gnu -ppc-asm-full-reg-names < %s | FileCheck %s
; Check that the peephole optimizer knows about sext and zext instructions.
; CHECK: test1sext
define i32 @test1sext(i64 %A, i64 %B, ptr %P, ptr %P2) nounwind {
  %C = add i64 %A, %B
  ; CHECK: add [[SUM:r[0-9]+]], r3, r4
  %D = trunc i64 %C to i32
  %E = shl i64 %C, 32
  %F = ashr i64 %E, 32
  ; CHECK: extsw [[EXT:r[0-9]+]], [[SUM]]
  store volatile i64 %F, ptr %P2
  ; CHECK-DAG: std [[EXT]]
  store volatile i32 %D, ptr %P
  ; Reuse low bits of extended register, don't extend live range of SUM.
  ; CHECK-DAG: stw [[SUM]]
  %R = add i32 %D, %D
  ret i32 %R
}