File: pow-025-075-intrinsic-scalar-mass-afn.ll

package info (click to toggle)
llvm-toolchain-16 1%3A16.0.6-15~deb12u1
  • links: PTS, VCS
  • area: main
  • in suites: bookworm
  • size: 1,634,792 kB
  • sloc: cpp: 6,179,261; ansic: 1,216,205; asm: 741,319; python: 196,614; objc: 75,325; f90: 49,640; lisp: 32,396; pascal: 12,286; sh: 9,394; perl: 7,442; ml: 5,494; awk: 3,523; makefile: 2,723; javascript: 1,206; xml: 886; fortran: 581; cs: 573
file content (94 lines) | stat: -rw-r--r-- 2,883 bytes parent folder | download | duplicates (13)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
; RUN: llc -enable-ppc-gen-scalar-mass -verify-machineinstrs -O3 -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck --check-prefix=CHECK-LNX %s
; RUN: llc -enable-ppc-gen-scalar-mass -verify-machineinstrs -O3 -mtriple=powerpc-ibm-aix-xcoff < %s | FileCheck --check-prefix=CHECK-AIX %s

declare float @llvm.pow.f32 (float, float);
declare double @llvm.pow.f64 (double, double);

; afn flag powf with 0.25
define float @llvmintr_powf_f32_afn025(float %a) {
; CHECK-LNX-LABEL: llvmintr_powf_f32_afn025:
; CHECK-LNX:       bl __xl_powf
; CHECK-LNX:       blr
;
; CHECK-AIX-LABEL: llvmintr_powf_f32_afn025:
; CHECK-AIX:       bl .__xl_powf[PR]
; CHECK-AIX:       blr
entry:
  %call = tail call afn float @llvm.pow.f32(float %a, float 2.500000e-01)
  ret float %call
}

; afn flag pow with 0.25
define double @llvmintr_pow_f64_afn025(double %a) {
; CHECK-LNX-LABEL: llvmintr_pow_f64_afn025:
; CHECK-LNX:       bl __xl_pow
; CHECK-LNX:       blr
;
; CHECK-AIX-LABEL: llvmintr_pow_f64_afn025:
; CHECK-AIX:       bl .__xl_pow[PR]
; CHECK-AIX:       blr
entry:
  %call = tail call afn double @llvm.pow.f64(double %a, double 2.500000e-01)
  ret double %call
}

; afn flag powf with 0.75
define float @llvmintr_powf_f32_afn075(float %a) {
; CHECK-LNX-LABEL: llvmintr_powf_f32_afn075:
; CHECK-LNX:       bl __xl_powf
; CHECK-LNX:       blr
;
; CHECK-AIX-LABEL: llvmintr_powf_f32_afn075:
; CHECK-AIX:       # %bb.0: # %entry
; CHECK-AIX:       bl .__xl_powf[PR]
; CHECK-AIX:       blr
entry:
  %call = tail call afn float @llvm.pow.f32(float %a, float 7.500000e-01)
  ret float %call
}

; afn flag pow with 0.75
define double @llvmintr_pow_f64_afn075(double %a) {
; CHECK-LNX-LABEL: llvmintr_pow_f64_afn075:
; CHECK-LNX:       bl __xl_pow
; CHECK-LNX:       blr
;
; CHECK-AIX-LABEL: llvmintr_pow_f64_afn075:
; CHECK-AIX:       bl .__xl_pow[PR]
; CHECK-AIX:       blr
entry:
  %call = tail call afn double @llvm.pow.f64(double %a, double 7.500000e-01)
  ret double %call
}

; afn flag powf with 0.50
define float @llvmintr_powf_f32_afn050(float %a) {
; CHECK-LNX-LABEL: llvmintr_powf_f32_afn050:
; CHECK-LNX:       # %bb.0: # %entry
; CHECK-LNX:       bl __xl_powf
; CHECK-LNX:       blr
;
; CHECK-AIX-LABEL: llvmintr_powf_f32_afn050:
; CHECK-AIX:       # %bb.0: # %entry
; CHECK-AIX:       bl .__xl_powf[PR]
; CHECK-AIX:       blr
entry:
  %call = tail call afn float @llvm.pow.f32(float %a, float 5.000000e-01)
  ret float %call
}

; afn flag pow with 0.50
define double @llvmintr_pow_f64_afn050(double %a) {
; CHECK-LNX-LABEL: llvmintr_pow_f64_afn050:
; CHECK-LNX:       # %bb.0: # %entry
; CHECK-LNX:       bl __xl_pow
; CHECK-LNX:       blr
;
; CHECK-AIX-LABEL: llvmintr_pow_f64_afn050:
; CHECK-AIX:       # %bb.0: # %entry
; CHECK-AIX:       bl .__xl_pow[PR]
; CHECK-AIX:       blr
entry:
  %call = tail call afn double @llvm.pow.f64(double %a, double 5.000000e-01)
  ret double %call
}