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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-unknown \
; RUN: -mcpu=pwr8 -code-model=large < %s | FileCheck %s
%struct.STATICS1 = type <{ [128 x i8] }>
@.STATICS1 = internal global %struct.STATICS1 <{ [128 x i8] c"\09\00\00\00\03\00\00\00\05\00\00\00\04\00\00\00\0A\00\00\00\0A\00\00\00\0B\00\00\00\0A\08\AF/\B8\B6\87\04 \A1\07\00\08\9D\00\00\09\00\00\00\05\00\00\00\03\00\00\00\03\00\00\00\05\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00" }>, align 16
@.C302_MAIN_ = internal constant i32 4
; Function Attrs: noinline norecurse nounwind
define void @main() {
; CHECK-LABEL: main:
; CHECK: # %bb.0: # %L.entry
; CHECK-NEXT: mflr 0
; CHECK-NEXT: stdu 1, -32(1)
; CHECK-NEXT: std 0, 48(1)
; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: .cfi_offset lr, 16
; CHECK-NEXT: addis 3, 2, .LC0@toc@ha
; CHECK-NEXT: addis 4, 2, .LC1@toc@ha
; CHECK-NEXT: ld 3, .LC0@toc@l(3)
; CHECK-NEXT: ld 4, .LC1@toc@l(4)
; CHECK-NEXT: addi 3, 3, 124
; CHECK-NEXT: bl testFunc
; CHECK-NEXT: nop
; CHECK-NEXT: addi 1, 1, 32
; CHECK-NEXT: ld 0, 16(1)
; CHECK-NEXT: mtlr 0
; CHECK-NEXT: blr
L.entry:
tail call void @testFunc(ptr getelementptr inbounds (%struct.STATICS1, ptr @.STATICS1, i64 0, i32 0, i64 124), ptr @.C302_MAIN_)
ret void
}
; Function Attrs: noinline norecurse nounwind readonly
define signext i32 @ifunc_(ptr nocapture readonly %i) {
; CHECK-LABEL: ifunc_:
; CHECK: # %bb.0: # %L.entry
; CHECK-NEXT: lwa 3, 0(3)
; CHECK-NEXT: blr
L.entry:
%0 = load i32, ptr %i, align 4
ret i32 %0
}
; Function Attrs: noinline norecurse nounwind
define void @testFunc(ptr nocapture %r, ptr nocapture readonly %k) {
; CHECK-LABEL: testFunc:
; CHECK: # %bb.0: # %L.entry
; CHECK-NEXT: mflr 0
; CHECK-NEXT: stdu 1, -32(1)
; CHECK-NEXT: std 0, 48(1)
; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: .cfi_offset lr, 16
; CHECK-NEXT: bl .L2$pb
; CHECK-NEXT: .L2$pb:
; CHECK-NEXT: lwz 4, 0(4)
; CHECK-NEXT: mflr 5
; CHECK-NEXT: addi 4, 4, -1
; CHECK-NEXT: cmplwi 4, 5
; CHECK-NEXT: bgt 0, .LBB2_6
; CHECK-NEXT: # %bb.1: # %L.entry
; CHECK-NEXT: addis 6, 2, .LC2@toc@ha
; CHECK-NEXT: rldic 4, 4, 2, 30
; CHECK-NEXT: ld 6, .LC2@toc@l(6)
; CHECK-NEXT: lwax 4, 4, 6
; CHECK-NEXT: add 4, 4, 5
; CHECK-NEXT: mtctr 4
; CHECK-NEXT: li 4, -3
; CHECK-NEXT: bctr
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB2_2: # %infloop11
; CHECK-NEXT: #
; CHECK-NEXT: b .LBB2_2
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB2_3: # %infloop
; CHECK-NEXT: #
; CHECK-NEXT: b .LBB2_3
; CHECK-NEXT: .LBB2_4: # %L.LB3_321.split
; CHECK-NEXT: li 4, 5
; CHECK-NEXT: .LBB2_5: # %L.LB3_307.sink.split
; CHECK-NEXT: stw 4, 0(3)
; CHECK-NEXT: .LBB2_6: # %L.LB3_307
; CHECK-NEXT: addi 1, 1, 32
; CHECK-NEXT: ld 0, 16(1)
; CHECK-NEXT: mtlr 0
; CHECK-NEXT: blr
L.entry:
%0 = load i32, ptr %k, align 4
switch i32 %0, label %L.LB3_307 [
i32 1, label %L.LB3_307.sink.split
i32 3, label %L.LB3_307.sink.split
i32 4, label %L.LB3_321.split
i32 5, label %L.LB3_307.sink.split
i32 6, label %infloop.preheader
i32 2, label %infloop11.preheader
]
infloop11.preheader: ; preds = %L.entry
br label %infloop11
infloop.preheader: ; preds = %L.entry
br label %infloop
L.LB3_321.split: ; preds = %L.entry
br label %L.LB3_307.sink.split
L.LB3_307.sink.split: ; preds = %L.LB3_321.split, %L.entry, %L.entry, %L.entry
%.sink = phi i32 [ 5, %L.LB3_321.split ], [ -3, %L.entry ], [ -3, %L.entry ], [ -3, %L.entry ]
store i32 %.sink, ptr %r, align 4
br label %L.LB3_307
L.LB3_307: ; preds = %L.LB3_307.sink.split, %L.entry
ret void
infloop: ; preds = %infloop.preheader, %infloop
br label %infloop
infloop11: ; preds = %infloop11.preheader, %infloop11
br label %infloop11
}
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