File: sop1-err.s

package info (click to toggle)
llvm-toolchain-16 1%3A16.0.6-15~deb12u1
  • links: PTS, VCS
  • area: main
  • in suites: bookworm
  • size: 1,634,792 kB
  • sloc: cpp: 6,179,261; ansic: 1,216,205; asm: 741,319; python: 196,614; objc: 75,325; f90: 49,640; lisp: 32,396; pascal: 12,286; sh: 9,394; perl: 7,442; ml: 5,494; awk: 3,523; makefile: 2,723; javascript: 1,206; xml: 886; fortran: 581; cs: 573
file content (44 lines) | stat: -rw-r--r-- 1,600 bytes parent folder | download | duplicates (4)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
// RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck -check-prefix=GCN --implicit-check-not=error: %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck -check-prefix=GCN --implicit-check-not=error: %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga %s 2>&1 | FileCheck --check-prefixes=GCN,VI --implicit-check-not=error: %s

s_mov_b32 v1, s2
// GCN: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction

s_mov_b32 s1, v0
// GCN: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction

s_mov_b32 s[1:2], s0
// GCN: :[[@LINE-1]]:{{[0-9]+}}: error: invalid register alignment

s_mov_b32 s0, s[1:2]
// GCN: :[[@LINE-1]]:{{[0-9]+}}: error: invalid register alignment

s_mov_b32 s220, s0
// GCN: :[[@LINE-1]]:{{[0-9]+}}: error: register index is out of range

s_mov_b32 s0, s220
// GCN: :[[@LINE-1]]:{{[0-9]+}}: error: register index is out of range

s_mov_b64 s1, s[0:1]
// GCN: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction

s_mov_b64 s[0:1], s1
// GCN: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction

// FIXME: This shoudl probably say failed to parse.
s_mov_b32 s
// GCN: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// Out of range register

s_mov_b32 s102, 1
// VI: :[[@LINE-1]]:{{[0-9]+}}: error: register not available on this GPU

s_mov_b32 s103, 1
// VI: :[[@LINE-1]]:{{[0-9]+}}: error: register not available on this GPU

s_mov_b64 s[102:103], -1
// VI: :[[@LINE-1]]:{{[0-9]+}}: error: register not available on this GPU

s_setpc_b64 0
// GCN: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction