File: X86InstrTDX.td

package info (click to toggle)
llvm-toolchain-17 1%3A17.0.6-22
  • links: PTS, VCS
  • area: main
  • in suites: forky, sid, trixie
  • size: 1,799,624 kB
  • sloc: cpp: 6,428,607; ansic: 1,383,196; asm: 793,408; python: 223,504; objc: 75,364; f90: 60,502; lisp: 33,869; pascal: 15,282; sh: 9,684; perl: 7,453; ml: 4,937; awk: 3,523; makefile: 2,889; javascript: 2,149; xml: 888; fortran: 619; cs: 573
file content (39 lines) | stat: -rw-r--r-- 1,298 bytes parent folder | download | duplicates (16)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
//===- X86InstrTDX.td - TDX Instruction Set Extension -*- tablegen -*===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file describes the instructions that make up the Intel TDX instruction
// set.
//
//===----------------------------------------------------------------------===//

//===----------------------------------------------------------------------===//
// TDX instructions

// 64-bit only instructions
let SchedRW = [WriteSystem], Predicates = [In64BitMode] in {
// SEAMCALL - Call to SEAM VMX-root Operation Module
def SEAMCALL : I<0x01, MRM_CF, (outs), (ins),
             "seamcall", []>, PD;

// SEAMRET - Return to Legacy VMX-root Operation
def SEAMRET : I<0x01, MRM_CD, (outs), (ins),
             "seamret", []>, PD;

// SEAMOPS - SEAM Operations
def SEAMOPS : I<0x01, MRM_CE, (outs), (ins),
             "seamops", []>, PD;

} // SchedRW

// common instructions
let SchedRW = [WriteSystem] in {
// TDCALL - Call SEAM Module Functions
def TDCALL : I<0x01, MRM_CC, (outs), (ins),
             "tdcall", []>, PD;

} // SchedRW