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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=arm64-apple-ios -aarch64-enable-collect-loh=false | FileCheck %s
define void @test(ptr %p1, i32 %v1) {
; CHECK-LABEL: test:
; CHECK: ; %bb.0: ; %entry
; CHECK-NEXT: sub sp, sp, #16
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: fmov.2d v0, #2.00000000
; CHECK-NEXT: mov x8, sp
; CHECK-NEXT: ; kill: def $w1 killed $w1 def $x1
; CHECK-NEXT: bfi x8, x1, #2, #2
; CHECK-NEXT: str q0, [sp]
; CHECK-NEXT: ldr s0, [x8]
; CHECK-NEXT: str s0, [x0]
; CHECK-NEXT: add sp, sp, #16
; CHECK-NEXT: ret
entry:
%v2 = extractelement <3 x float> <float 0.000000e+00, float 2.000000e+00, float 0.000000e+00>, i32 %v1
store float %v2, ptr %p1, align 4
ret void
}
define void @test2(ptr %p1, i32 %v1) {
; CHECK-LABEL: test2:
; CHECK: ; %bb.0: ; %entry
; CHECK-NEXT: sub sp, sp, #16
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: movi.16b v0, #63
; CHECK-NEXT: mov x8, sp
; CHECK-NEXT: ; kill: def $w1 killed $w1 def $x1
; CHECK-NEXT: bfi x8, x1, #2, #2
; CHECK-NEXT: str q0, [sp]
; CHECK-NEXT: ldr s0, [x8]
; CHECK-NEXT: str s0, [x0]
; CHECK-NEXT: add sp, sp, #16
; CHECK-NEXT: ret
entry:
%v2 = extractelement <3 x float> <float 0.7470588088035583, float 0.7470588088035583, float 0.7470588088035583>, i32 %v1
store float %v2, ptr %p1, align 4
ret void
}
%"st1" = type { %"subst1", %"subst1", %"subst1" }
%"subst1" = type { %float4 }
%float4 = type { float, float, float, float }
@_gv = external unnamed_addr global %"st1", align 8
define internal void @nvcast_f32_v8i8() {
; CHECK-LABEL: nvcast_f32_v8i8:
; CHECK: ; %bb.0: ; %entry
; CHECK-NEXT: adrp x8, __gv@GOTPAGE
; CHECK-NEXT: movi.8b v0, #254
; CHECK-NEXT: ldr x8, [x8, __gv@GOTPAGEOFF]
; CHECK-NEXT: str d0, [x8]
; CHECK-NEXT: ret
entry:
store <2 x float> <float 0xC7DFDFDFC0000000, float 0xC7DFDFDFC0000000>, ptr @_gv, align 8
ret void
}
%struct.Vector3 = type { float, float, float }
define void @nvcast_v2f32_v1f64(ptr) {
; CHECK-LABEL: nvcast_v2f32_v1f64:
; CHECK: ; %bb.0: ; %entry
; CHECK-NEXT: fmov.2s v0, #1.00000000
; CHECK-NEXT: str d0, [x0]
; CHECK-NEXT: ret
entry:
store <1 x double> <double 0x3F8000003F800000>, ptr %0, align 8
ret void
}
define <4 x float> @testv4i16(<2 x float> %l1) {
; CHECK-LABEL: testv4i16:
; CHECK: ; %bb.0:
; CHECK-NEXT: movi.4h v1, #16
; CHECK-NEXT: ; kill: def $d0 killed $d0 def $q0
; CHECK-NEXT: mov.d v1[1], v0[0]
; CHECK-NEXT: mov.16b v0, v1
; CHECK-NEXT: ret
%l2 = shufflevector <2 x float> <float 0x37E0001000000000, float 0x37E0001000000000>, <2 x float> %l1, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
ret <4 x float> %l2
}
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