File: complex-deinterleaving-f16-add.ll

package info (click to toggle)
llvm-toolchain-17 1%3A17.0.6-22
  • links: PTS, VCS
  • area: main
  • in suites: forky, sid, trixie
  • size: 1,799,624 kB
  • sloc: cpp: 6,428,607; ansic: 1,383,196; asm: 793,408; python: 223,504; objc: 75,364; f90: 60,502; lisp: 33,869; pascal: 15,282; sh: 9,684; perl: 7,453; ml: 4,937; awk: 3,523; makefile: 2,889; javascript: 2,149; xml: 888; fortran: 619; cs: 573
file content (168 lines) | stat: -rw-r--r-- 9,652 bytes parent folder | download | duplicates (2)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s --mattr=+complxnum,+neon,+fullfp16 -o - | FileCheck %s
; RUN: llc < %s --mattr=+complxnum,+neon,+fullfp16,+sve -o - | FileCheck %s

target triple = "aarch64"

; Expected to not transform
define <2 x half> @complex_add_v2f16(<2 x half> %a, <2 x half> %b) {
; CHECK-LABEL: complex_add_v2f16:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    // kill: def $d1 killed $d1 def $q1
; CHECK-NEXT:    // kill: def $d0 killed $d0 def $q0
; CHECK-NEXT:    mov h2, v0.h[1]
; CHECK-NEXT:    mov h3, v1.h[1]
; CHECK-NEXT:    fsub h1, h1, h2
; CHECK-NEXT:    fadd h0, h3, h0
; CHECK-NEXT:    mov v1.h[1], v0.h[0]
; CHECK-NEXT:    fmov d0, d1
; CHECK-NEXT:    ret
entry:
  %a.real = shufflevector <2 x half> %a, <2 x half> zeroinitializer, <1 x i32> <i32 0>
  %a.imag = shufflevector <2 x half> %a, <2 x half> zeroinitializer, <1 x i32> <i32 1>
  %b.real = shufflevector <2 x half> %b, <2 x half> zeroinitializer, <1 x i32> <i32 0>
  %b.imag = shufflevector <2 x half> %b, <2 x half> zeroinitializer, <1 x i32> <i32 1>
  %0 = fsub fast <1 x half> %b.real, %a.imag
  %1 = fadd fast <1 x half> %b.imag, %a.real
  %interleaved.vec = shufflevector <1 x half> %0, <1 x half> %1, <2 x i32> <i32 0, i32 1>
  ret <2 x half> %interleaved.vec
}

; Expected to transform
define <4 x half> @complex_add_v4f16(<4 x half> %a, <4 x half> %b) {
; CHECK-LABEL: complex_add_v4f16:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    fcadd v0.4h, v1.4h, v0.4h, #90
; CHECK-NEXT:    ret
entry:
  %a.real = shufflevector <4 x half> %a, <4 x half> zeroinitializer, <2 x i32> <i32 0, i32 2>
  %a.imag = shufflevector <4 x half> %a, <4 x half> zeroinitializer, <2 x i32> <i32 1, i32 3>
  %b.real = shufflevector <4 x half> %b, <4 x half> zeroinitializer, <2 x i32> <i32 0, i32 2>
  %b.imag = shufflevector <4 x half> %b, <4 x half> zeroinitializer, <2 x i32> <i32 1, i32 3>
  %0 = fsub fast <2 x half> %b.real, %a.imag
  %1 = fadd fast <2 x half> %b.imag, %a.real
  %interleaved.vec = shufflevector <2 x half> %0, <2 x half> %1, <4 x i32> <i32 0, i32 2, i32 1, i32 3>
  ret <4 x half> %interleaved.vec
}

; Expected to transform
define <8 x half> @complex_add_v8f16(<8 x half> %a, <8 x half> %b) {
; CHECK-LABEL: complex_add_v8f16:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    fcadd v0.8h, v1.8h, v0.8h, #90
; CHECK-NEXT:    ret
entry:
  %a.real = shufflevector <8 x half> %a, <8 x half> zeroinitializer, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
  %a.imag = shufflevector <8 x half> %a, <8 x half> zeroinitializer, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
  %b.real = shufflevector <8 x half> %b, <8 x half> zeroinitializer, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
  %b.imag = shufflevector <8 x half> %b, <8 x half> zeroinitializer, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
  %0 = fsub fast <4 x half> %b.real, %a.imag
  %1 = fadd fast <4 x half> %b.imag, %a.real
  %interleaved.vec = shufflevector <4 x half> %0, <4 x half> %1, <8 x i32> <i32 0, i32 4, i32 1, i32 5, i32 2, i32 6, i32 3, i32 7>
  ret <8 x half> %interleaved.vec
}

; Expected to transform
define <16 x half> @complex_add_v16f16(<16 x half> %a, <16 x half> %b) {
; CHECK-LABEL: complex_add_v16f16:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    fcadd v0.8h, v2.8h, v0.8h, #90
; CHECK-NEXT:    fcadd v1.8h, v3.8h, v1.8h, #90
; CHECK-NEXT:    ret
entry:
  %a.real = shufflevector <16 x half> %a, <16 x half> zeroinitializer, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
  %a.imag = shufflevector <16 x half> %a, <16 x half> zeroinitializer, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
  %b.real = shufflevector <16 x half> %b, <16 x half> zeroinitializer, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
  %b.imag = shufflevector <16 x half> %b, <16 x half> zeroinitializer, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
  %0 = fsub fast <8 x half> %b.real, %a.imag
  %1 = fadd fast <8 x half> %b.imag, %a.real
  %interleaved.vec = shufflevector <8 x half> %0, <8 x half> %1, <16 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11, i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
  ret <16 x half> %interleaved.vec
}

; Expected to transform
define <32 x half> @complex_add_v32f16(<32 x half> %a, <32 x half> %b) {
; CHECK-LABEL: complex_add_v32f16:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    fcadd v2.8h, v6.8h, v2.8h, #90
; CHECK-NEXT:    fcadd v0.8h, v4.8h, v0.8h, #90
; CHECK-NEXT:    fcadd v1.8h, v5.8h, v1.8h, #90
; CHECK-NEXT:    fcadd v3.8h, v7.8h, v3.8h, #90
; CHECK-NEXT:    ret
entry:
  %a.real = shufflevector <32 x half> %a, <32 x half> zeroinitializer, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
  %a.imag = shufflevector <32 x half> %a, <32 x half> zeroinitializer, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
  %b.real = shufflevector <32 x half> %b, <32 x half> zeroinitializer, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
  %b.imag = shufflevector <32 x half> %b, <32 x half> zeroinitializer, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
  %0 = fsub fast <16 x half> %b.real, %a.imag
  %1 = fadd fast <16 x half> %b.imag, %a.real
  %interleaved.vec = shufflevector <16 x half> %0, <16 x half> %1, <32 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23, i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31>
  ret <32 x half> %interleaved.vec
}

; Expected to transform
define <4 x half> @complex_add_v4f16_with_intrinsic(<4 x half> %a, <4 x half> %b) {
; CHECK-LABEL: complex_add_v4f16_with_intrinsic:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    fcadd v0.4h, v1.4h, v0.4h, #90
; CHECK-NEXT:    ret
entry:
  %a.deinterleaved = tail call { <2 x half>, <2 x half> } @llvm.experimental.vector.deinterleave2.v4f16(<4 x half> %a)
  %a.real = extractvalue { <2 x half>, <2 x half> } %a.deinterleaved, 0
  %a.imag = extractvalue { <2 x half>, <2 x half> } %a.deinterleaved, 1
  %b.deinterleaved = tail call { <2 x half>, <2 x half> } @llvm.experimental.vector.deinterleave2.v4f16(<4 x half> %b)
  %b.real = extractvalue { <2 x half>, <2 x half> } %b.deinterleaved, 0
  %b.imag = extractvalue { <2 x half>, <2 x half> } %b.deinterleaved, 1
  %0 = fsub fast <2 x half> %b.real, %a.imag
  %1 = fadd fast <2 x half> %b.imag, %a.real
  %interleaved.vec = tail call <4 x half> @llvm.experimental.vector.interleave2.v4f16(<2 x half> %0, <2 x half> %1)
  ret <4 x half> %interleaved.vec
}

; Expected to transform
define <8 x half> @complex_add_v8f16_with_intrinsic(<8 x half> %a, <8 x half> %b) {
; CHECK-LABEL: complex_add_v8f16_with_intrinsic:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    fcadd v0.8h, v1.8h, v0.8h, #90
; CHECK-NEXT:    ret
entry:
  %a.deinterleaved = tail call { <4 x half>, <4 x half> } @llvm.experimental.vector.deinterleave2.v8f16(<8 x half> %a)
  %a.real = extractvalue { <4 x half>, <4 x half> } %a.deinterleaved, 0
  %a.imag = extractvalue { <4 x half>, <4 x half> } %a.deinterleaved, 1
  %b.deinterleaved = tail call { <4 x half>, <4 x half> } @llvm.experimental.vector.deinterleave2.v8f16(<8 x half> %b)
  %b.real = extractvalue { <4 x half>, <4 x half> } %b.deinterleaved, 0
  %b.imag = extractvalue { <4 x half>, <4 x half> } %b.deinterleaved, 1
  %0 = fsub fast <4 x half> %b.real, %a.imag
  %1 = fadd fast <4 x half> %b.imag, %a.real
  %interleaved.vec = tail call <8 x half> @llvm.experimental.vector.interleave2.v8f16(<4 x half> %0, <4 x half> %1)
  ret <8 x half> %interleaved.vec
}

; Expected to transform
define <16 x half> @complex_add_v16f16_with_intrinsic(<16 x half> %a, <16 x half> %b) {
; CHECK-LABEL: complex_add_v16f16_with_intrinsic:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    fcadd v0.8h, v2.8h, v0.8h, #90
; CHECK-NEXT:    fcadd v1.8h, v3.8h, v1.8h, #90
; CHECK-NEXT:    ret
entry:
  %a.deinterleaved = tail call { <8 x half>, <8 x half> } @llvm.experimental.vector.deinterleave2.v16f16(<16 x half> %a)
  %a.real = extractvalue { <8 x half>, <8 x half> } %a.deinterleaved, 0
  %a.imag = extractvalue { <8 x half>, <8 x half> } %a.deinterleaved, 1
  %b.deinterleaved = tail call { <8 x half>, <8 x half> } @llvm.experimental.vector.deinterleave2.v16f16(<16 x half> %b)
  %b.real = extractvalue { <8 x half>, <8 x half> } %b.deinterleaved, 0
  %b.imag = extractvalue { <8 x half>, <8 x half> } %b.deinterleaved, 1
  %0 = fsub fast <8 x half> %b.real, %a.imag
  %1 = fadd fast <8 x half> %b.imag, %a.real
  %interleaved.vec = tail call <16 x half> @llvm.experimental.vector.interleave2.v16f16(<8 x half> %0, <8 x half> %1)
  ret <16 x half> %interleaved.vec
}

declare { <2 x half>, <2 x half> } @llvm.experimental.vector.deinterleave2.v4f16(<4 x half>)
declare <4 x half> @llvm.experimental.vector.interleave2.v4f16(<2 x half>, <2 x half>)

declare { <4 x half>, <4 x half> } @llvm.experimental.vector.deinterleave2.v8f16(<8 x half>)
declare <8 x half> @llvm.experimental.vector.interleave2.v8f16(<4 x half>, <4 x half>)

declare { <8 x half>, <8 x half> } @llvm.experimental.vector.deinterleave2.v16f16(<16 x half>)
declare <16 x half> @llvm.experimental.vector.interleave2.v16f16(<8 x half>, <8 x half>)