File: inst-select-fminnum-ieee.v2s16.mir

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llvm-toolchain-17 1%3A17.0.6-22
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs -o - %s  | FileCheck -check-prefix=GFX9 %s
# RUN: llc -march=amdgcn -mcpu=gfx1010 -run-pass=instruction-select -verify-machineinstrs -o - %s  | FileCheck -check-prefix=GFX9 %s
# RUN: llc -march=amdgcn -mcpu=gfx1100 -run-pass=instruction-select -verify-machineinstrs -o - %s  | FileCheck -check-prefix=GFX9 %s

---
name: fminnum_ieee_v2f16_vv
legalized: true
regBankSelected: true

body: |
  bb.0:
    liveins: $sgpr0, $sgpr1

    ; GFX9-LABEL: name: fminnum_ieee_v2f16_vv
    ; GFX9: liveins: $sgpr0, $sgpr1
    ; GFX9-NEXT: {{  $}}
    ; GFX9-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
    ; GFX9-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
    ; GFX9-NEXT: %2:vgpr_32 = nofpexcept V_PK_MIN_F16 8, [[COPY]], 8, [[COPY1]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec
    ; GFX9-NEXT: S_ENDPGM 0, implicit %2
    %0:vgpr(<2 x s16>) = COPY $vgpr0
    %1:vgpr(<2 x s16>) = COPY $vgpr1
    %2:vgpr(<2 x s16>) = G_FMINNUM_IEEE %0, %1
    S_ENDPGM 0, implicit %2
...