1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
|
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
; FIXME: Missing operand promote for f16
; XUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti < %s | FileCheck -check-prefixes=GCN,SI %s
; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx803 < %s | FileCheck -check-prefixes=GCN,GFX89,GFX8 %s
; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 < %s | FileCheck -check-prefixes=GCN,GFX89,GFX9 %s
; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1010 < %s | FileCheck -check-prefixes=GCN,GFX1011,GFX10 %s
; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1100 -amdgpu-enable-delay-alu=0 < %s | FileCheck -check-prefixes=GCN,GFX1011,GFX11 %s
define float @v_constrained_fpext_f16_to_f32_fpexcept_strict(half %arg) #0 {
; GCN-LABEL: v_constrained_fpext_f16_to_f32_fpexcept_strict:
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: v_cvt_f32_f16_e32 v0, v0
; GCN-NEXT: s_setpc_b64 s[30:31]
%result = call float @llvm.experimental.constrained.fpext.f32.f16(half %arg, metadata !"fpexcept.strict")
ret float %result
}
define <2 x float> @v_constrained_fpext_v2f16_to_v2f32_fpexcept_strict(<2 x half> %arg) #0 {
; GFX89-LABEL: v_constrained_fpext_v2f16_to_v2f32_fpexcept_strict:
; GFX89: ; %bb.0:
; GFX89-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX89-NEXT: v_cvt_f32_f16_e32 v2, v0
; GFX89-NEXT: v_cvt_f32_f16_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
; GFX89-NEXT: v_mov_b32_e32 v0, v2
; GFX89-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-LABEL: v_constrained_fpext_v2f16_to_v2f32_fpexcept_strict:
; GFX10: ; %bb.0:
; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-NEXT: v_cvt_f32_f16_e32 v2, v0
; GFX10-NEXT: v_cvt_f32_f16_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
; GFX10-NEXT: v_mov_b32_e32 v0, v2
; GFX10-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-LABEL: v_constrained_fpext_v2f16_to_v2f32_fpexcept_strict:
; GFX11: ; %bb.0:
; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-NEXT: v_lshrrev_b32_e32 v1, 16, v0
; GFX11-NEXT: v_cvt_f32_f16_e32 v0, v0
; GFX11-NEXT: v_cvt_f32_f16_e32 v1, v1
; GFX11-NEXT: s_setpc_b64 s[30:31]
%result = call <2 x float> @llvm.experimental.constrained.fpext.v2f32.v2f16(<2 x half> %arg, metadata !"fpexcept.strict")
ret <2 x float> %result
}
define <3 x float> @v_constrained_fpext_v3f16_to_v3f32_fpexcept_strict(<3 x half> %arg) #0 {
; GFX89-LABEL: v_constrained_fpext_v3f16_to_v3f32_fpexcept_strict:
; GFX89: ; %bb.0:
; GFX89-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX89-NEXT: v_cvt_f32_f16_e32 v4, v0
; GFX89-NEXT: v_cvt_f32_f16_sdwa v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
; GFX89-NEXT: v_cvt_f32_f16_e32 v2, v1
; GFX89-NEXT: v_mov_b32_e32 v0, v4
; GFX89-NEXT: v_mov_b32_e32 v1, v3
; GFX89-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-LABEL: v_constrained_fpext_v3f16_to_v3f32_fpexcept_strict:
; GFX10: ; %bb.0:
; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-NEXT: v_cvt_f32_f16_e32 v4, v0
; GFX10-NEXT: v_cvt_f32_f16_sdwa v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
; GFX10-NEXT: v_cvt_f32_f16_e32 v2, v1
; GFX10-NEXT: v_mov_b32_e32 v0, v4
; GFX10-NEXT: v_mov_b32_e32 v1, v3
; GFX10-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-LABEL: v_constrained_fpext_v3f16_to_v3f32_fpexcept_strict:
; GFX11: ; %bb.0:
; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX11-NEXT: v_cvt_f32_f16_e32 v0, v0
; GFX11-NEXT: v_cvt_f32_f16_e32 v3, v2
; GFX11-NEXT: v_cvt_f32_f16_e32 v2, v1
; GFX11-NEXT: v_mov_b32_e32 v1, v3
; GFX11-NEXT: s_setpc_b64 s[30:31]
%result = call <3 x float> @llvm.experimental.constrained.fpext.v3f32.v3f16(<3 x half> %arg, metadata !"fpexcept.strict")
ret <3 x float> %result
}
define double @v_constrained_fpext_f32_to_f64_fpexcept_strict(float %arg) #0 {
; GCN-LABEL: v_constrained_fpext_f32_to_f64_fpexcept_strict:
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
; GCN-NEXT: s_setpc_b64 s[30:31]
%result = call double @llvm.experimental.constrained.fpext.f64.f32(float %arg, metadata !"fpexcept.strict")
ret double %result
}
define <2 x double> @v_constrained_fpext_v2f32_to_v2f64_fpexcept_strict(<2 x float> %arg) #0 {
; GCN-LABEL: v_constrained_fpext_v2f32_to_v2f64_fpexcept_strict:
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: v_mov_b32_e32 v2, v1
; GCN-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
; GCN-NEXT: v_cvt_f64_f32_e32 v[2:3], v2
; GCN-NEXT: s_setpc_b64 s[30:31]
%result = call <2 x double> @llvm.experimental.constrained.fpext.v2f64.v2f32(<2 x float> %arg, metadata !"fpexcept.strict")
ret <2 x double> %result
}
define <3 x double> @v_constrained_fpext_v3f32_to_v3f64_fpexcept_strict(<3 x float> %arg) #0 {
; GFX89-LABEL: v_constrained_fpext_v3f32_to_v3f64_fpexcept_strict:
; GFX89: ; %bb.0:
; GFX89-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX89-NEXT: v_mov_b32_e32 v4, v2
; GFX89-NEXT: v_mov_b32_e32 v2, v1
; GFX89-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
; GFX89-NEXT: v_cvt_f64_f32_e32 v[2:3], v2
; GFX89-NEXT: v_cvt_f64_f32_e32 v[4:5], v4
; GFX89-NEXT: s_setpc_b64 s[30:31]
;
; GFX1011-LABEL: v_constrained_fpext_v3f32_to_v3f64_fpexcept_strict:
; GFX1011: ; %bb.0:
; GFX1011-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1011-NEXT: v_mov_b32_e32 v4, v2
; GFX1011-NEXT: v_mov_b32_e32 v2, v1
; GFX1011-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
; GFX1011-NEXT: v_cvt_f64_f32_e32 v[4:5], v4
; GFX1011-NEXT: v_cvt_f64_f32_e32 v[2:3], v2
; GFX1011-NEXT: s_setpc_b64 s[30:31]
%result = call <3 x double> @llvm.experimental.constrained.fpext.v3f64.v3f32(<3 x float> %arg, metadata !"fpexcept.strict")
ret <3 x double> %result
}
define double @v_constrained_fpext_f16_to_f64_fpexcept_strict(half %arg) #0 {
; GCN-LABEL: v_constrained_fpext_f16_to_f64_fpexcept_strict:
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: v_cvt_f32_f16_e32 v0, v0
; GCN-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
; GCN-NEXT: s_setpc_b64 s[30:31]
%result = call double @llvm.experimental.constrained.fpext.f64.f16(half %arg, metadata !"fpexcept.strict")
ret double %result
}
define <2 x double> @v_constrained_fpext_v2f16_to_v2f64_fpexcept_strict(<2 x half> %arg) #0 {
; GFX89-LABEL: v_constrained_fpext_v2f16_to_v2f64_fpexcept_strict:
; GFX89: ; %bb.0:
; GFX89-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX89-NEXT: v_cvt_f32_f16_e32 v1, v0
; GFX89-NEXT: v_cvt_f32_f16_sdwa v2, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
; GFX89-NEXT: v_cvt_f64_f32_e32 v[0:1], v1
; GFX89-NEXT: v_cvt_f64_f32_e32 v[2:3], v2
; GFX89-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-LABEL: v_constrained_fpext_v2f16_to_v2f64_fpexcept_strict:
; GFX10: ; %bb.0:
; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-NEXT: v_cvt_f32_f16_e32 v1, v0
; GFX10-NEXT: v_cvt_f32_f16_sdwa v2, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
; GFX10-NEXT: v_cvt_f64_f32_e32 v[0:1], v1
; GFX10-NEXT: v_cvt_f64_f32_e32 v[2:3], v2
; GFX10-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-LABEL: v_constrained_fpext_v2f16_to_v2f64_fpexcept_strict:
; GFX11: ; %bb.0:
; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-NEXT: v_lshrrev_b32_e32 v1, 16, v0
; GFX11-NEXT: v_cvt_f32_f16_e32 v0, v0
; GFX11-NEXT: v_cvt_f32_f16_e32 v2, v1
; GFX11-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
; GFX11-NEXT: v_cvt_f64_f32_e32 v[2:3], v2
; GFX11-NEXT: s_setpc_b64 s[30:31]
%result = call <2 x double> @llvm.experimental.constrained.fpext.v2f64.v2f16(<2 x half> %arg, metadata !"fpexcept.strict")
ret <2 x double> %result
}
define <3 x double> @v_constrained_fpext_v3f16_to_v2f64_fpexcept_strict(<3 x half> %arg) #0 {
; GFX89-LABEL: v_constrained_fpext_v3f16_to_v2f64_fpexcept_strict:
; GFX89: ; %bb.0:
; GFX89-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX89-NEXT: v_cvt_f32_f16_e32 v2, v0
; GFX89-NEXT: v_cvt_f32_f16_sdwa v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
; GFX89-NEXT: v_cvt_f32_f16_e32 v4, v1
; GFX89-NEXT: v_cvt_f64_f32_e32 v[0:1], v2
; GFX89-NEXT: v_cvt_f64_f32_e32 v[2:3], v3
; GFX89-NEXT: v_cvt_f64_f32_e32 v[4:5], v4
; GFX89-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-LABEL: v_constrained_fpext_v3f16_to_v2f64_fpexcept_strict:
; GFX10: ; %bb.0:
; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-NEXT: v_cvt_f32_f16_e32 v2, v0
; GFX10-NEXT: v_cvt_f32_f16_sdwa v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
; GFX10-NEXT: v_cvt_f32_f16_e32 v4, v1
; GFX10-NEXT: v_cvt_f64_f32_e32 v[0:1], v2
; GFX10-NEXT: v_cvt_f64_f32_e32 v[2:3], v3
; GFX10-NEXT: v_cvt_f64_f32_e32 v[4:5], v4
; GFX10-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-LABEL: v_constrained_fpext_v3f16_to_v2f64_fpexcept_strict:
; GFX11: ; %bb.0:
; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX11-NEXT: v_cvt_f32_f16_e32 v0, v0
; GFX11-NEXT: v_cvt_f32_f16_e32 v3, v1
; GFX11-NEXT: v_cvt_f32_f16_e32 v2, v2
; GFX11-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
; GFX11-NEXT: v_cvt_f64_f32_e32 v[4:5], v3
; GFX11-NEXT: v_cvt_f64_f32_e32 v[2:3], v2
; GFX11-NEXT: s_setpc_b64 s[30:31]
%result = call <3 x double> @llvm.experimental.constrained.fpext.v3f64.v3f16(<3 x half> %arg, metadata !"fpexcept.strict")
ret <3 x double> %result
}
define float @v_constrained_fneg_fpext_f16_to_f32_fpexcept_strict(half %arg) #0 {
; GCN-LABEL: v_constrained_fneg_fpext_f16_to_f32_fpexcept_strict:
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: v_cvt_f32_f16_e32 v0, v0
; GCN-NEXT: v_xor_b32_e32 v0, 0x80000000, v0
; GCN-NEXT: s_setpc_b64 s[30:31]
%result = call float @llvm.experimental.constrained.fpext.f32.f16(half %arg, metadata !"fpexcept.strict")
%neg.result = fneg float %result
ret float %neg.result
}
define float @v_constrained_fpext_fneg_f16_to_f32_fpexcept_strict(half %arg) #0 {
; GCN-LABEL: v_constrained_fpext_fneg_f16_to_f32_fpexcept_strict:
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: v_cvt_f32_f16_e64 v0, -v0
; GCN-NEXT: s_setpc_b64 s[30:31]
%neg.arg = fneg half %arg
%result = call float @llvm.experimental.constrained.fpext.f32.f16(half %neg.arg, metadata !"fpexcept.strict")
ret float %result
}
define double @v_constrained_fpext_fneg_f32_to_f64_fpexcept_strict(float %arg) #0 {
; GCN-LABEL: v_constrained_fpext_fneg_f32_to_f64_fpexcept_strict:
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
; GCN-NEXT: s_setpc_b64 s[30:31]
%neg.arg = fneg float %arg
%result = call double @llvm.experimental.constrained.fpext.f64.f32(float %arg, metadata !"fpexcept.strict")
ret double %result
}
define double @v_constrained_fneg_fpext_f32_to_f64_fpexcept_strict(float %arg) #0 {
; GCN-LABEL: v_constrained_fneg_fpext_f32_to_f64_fpexcept_strict:
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
; GCN-NEXT: v_xor_b32_e32 v1, 0x80000000, v1
; GCN-NEXT: s_setpc_b64 s[30:31]
%result = call double @llvm.experimental.constrained.fpext.f64.f32(float %arg, metadata !"fpexcept.strict")
%neg.result = fneg double %result
ret double %neg.result
}
declare double @llvm.experimental.constrained.fpext.f64.f32(float, metadata) #1
declare <2 x double> @llvm.experimental.constrained.fpext.v2f64.v2f32(<2 x float>, metadata) #1
declare <3 x double> @llvm.experimental.constrained.fpext.v3f64.v3f32(<3 x float>, metadata) #1
declare double @llvm.experimental.constrained.fpext.f64.f16(half, metadata) #1
declare <2 x double> @llvm.experimental.constrained.fpext.v2f64.v2f16(<2 x half>, metadata) #1
declare <3 x double> @llvm.experimental.constrained.fpext.v3f64.v3f16(<3 x half>, metadata) #1
declare float @llvm.experimental.constrained.fpext.f32.f16(half, metadata) #1
declare <2 x float> @llvm.experimental.constrained.fpext.v2f32.v2f16(<2 x half>, metadata) #1
declare <3 x float> @llvm.experimental.constrained.fpext.v3f32.v3f16(<3 x half>, metadata) #1
attributes #0 = { strictfp }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: readwrite) }
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
; GFX8: {{.*}}
; GFX9: {{.*}}
|
