1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
|
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -verify-machineinstrs -csky-no-aliases < %s -mtriple=csky -float-abi=hard -mattr=+hard-float -mattr=+2e3 -mattr=+fpuv2_sf,+fpuv2_df | FileCheck %s --check-prefix=CHECK-FPUV2
; RUN: llc -verify-machineinstrs -csky-no-aliases < %s -mtriple=csky -float-abi=hard -mattr=+hard-float -mattr=+2e3 -mattr=+fpuv3_sf,+fpuv3_df | FileCheck %s --check-prefix=CHECK-FPUV3
define void @test_load_store(ptr %p, ptr %q) nounwind {
; CHECK-FPUV2-LABEL: test_load_store:
; CHECK-FPUV2: # %bb.0:
; CHECK-FPUV2-NEXT: ld16.h a0, (a0, 0)
; CHECK-FPUV2-NEXT: st16.h a0, (a1, 0)
; CHECK-FPUV2-NEXT: rts16
;
; CHECK-FPUV3-LABEL: test_load_store:
; CHECK-FPUV3: # %bb.0:
; CHECK-FPUV3-NEXT: ld16.h a0, (a0, 0)
; CHECK-FPUV3-NEXT: st16.h a0, (a1, 0)
; CHECK-FPUV3-NEXT: rts16
%a = load half, ptr %p
store half %a, ptr %q
ret void
}
define float @test_fpextend_float(ptr %p) nounwind {
; CHECK-FPUV2-LABEL: test_fpextend_float:
; CHECK-FPUV2: # %bb.0:
; CHECK-FPUV2-NEXT: subi16 sp, sp, 4
; CHECK-FPUV2-NEXT: st32.w lr, (sp, 0) # 4-byte Folded Spill
; CHECK-FPUV2-NEXT: ld16.h a0, (a0, 0)
; CHECK-FPUV2-NEXT: jsri32 [.LCPI1_0]
; CHECK-FPUV2-NEXT: ld32.w lr, (sp, 0) # 4-byte Folded Reload
; CHECK-FPUV2-NEXT: addi16 sp, sp, 4
; CHECK-FPUV2-NEXT: rts16
; CHECK-FPUV2-NEXT: .p2align 1
; CHECK-FPUV2-NEXT: # %bb.1:
; CHECK-FPUV2-NEXT: .p2align 2, 0x0
; CHECK-FPUV2-NEXT: .LCPI1_0:
; CHECK-FPUV2-NEXT: .long __gnu_h2f_ieee
;
; CHECK-FPUV3-LABEL: test_fpextend_float:
; CHECK-FPUV3: # %bb.0:
; CHECK-FPUV3-NEXT: subi16 sp, sp, 4
; CHECK-FPUV3-NEXT: st32.w lr, (sp, 0) # 4-byte Folded Spill
; CHECK-FPUV3-NEXT: ld16.h a0, (a0, 0)
; CHECK-FPUV3-NEXT: jsri32 [.LCPI1_0]
; CHECK-FPUV3-NEXT: ld32.w lr, (sp, 0) # 4-byte Folded Reload
; CHECK-FPUV3-NEXT: addi16 sp, sp, 4
; CHECK-FPUV3-NEXT: rts16
; CHECK-FPUV3-NEXT: .p2align 1
; CHECK-FPUV3-NEXT: # %bb.1:
; CHECK-FPUV3-NEXT: .p2align 2, 0x0
; CHECK-FPUV3-NEXT: .LCPI1_0:
; CHECK-FPUV3-NEXT: .long __gnu_h2f_ieee
%a = load half, ptr %p
%r = fpext half %a to float
ret float %r
}
define double @test_fpextend_double(ptr %p) nounwind {
; CHECK-FPUV2-LABEL: test_fpextend_double:
; CHECK-FPUV2: # %bb.0:
; CHECK-FPUV2-NEXT: subi16 sp, sp, 4
; CHECK-FPUV2-NEXT: st32.w lr, (sp, 0) # 4-byte Folded Spill
; CHECK-FPUV2-NEXT: ld16.h a0, (a0, 0)
; CHECK-FPUV2-NEXT: jsri32 [.LCPI2_0]
; CHECK-FPUV2-NEXT: fstod vr0, vr0
; CHECK-FPUV2-NEXT: ld32.w lr, (sp, 0) # 4-byte Folded Reload
; CHECK-FPUV2-NEXT: addi16 sp, sp, 4
; CHECK-FPUV2-NEXT: rts16
; CHECK-FPUV2-NEXT: .p2align 1
; CHECK-FPUV2-NEXT: # %bb.1:
; CHECK-FPUV2-NEXT: .p2align 2, 0x0
; CHECK-FPUV2-NEXT: .LCPI2_0:
; CHECK-FPUV2-NEXT: .long __gnu_h2f_ieee
;
; CHECK-FPUV3-LABEL: test_fpextend_double:
; CHECK-FPUV3: # %bb.0:
; CHECK-FPUV3-NEXT: subi16 sp, sp, 4
; CHECK-FPUV3-NEXT: st32.w lr, (sp, 0) # 4-byte Folded Spill
; CHECK-FPUV3-NEXT: ld16.h a0, (a0, 0)
; CHECK-FPUV3-NEXT: jsri32 [.LCPI2_0]
; CHECK-FPUV3-NEXT: fstod vr0, vr0
; CHECK-FPUV3-NEXT: ld32.w lr, (sp, 0) # 4-byte Folded Reload
; CHECK-FPUV3-NEXT: addi16 sp, sp, 4
; CHECK-FPUV3-NEXT: rts16
; CHECK-FPUV3-NEXT: .p2align 1
; CHECK-FPUV3-NEXT: # %bb.1:
; CHECK-FPUV3-NEXT: .p2align 2, 0x0
; CHECK-FPUV3-NEXT: .LCPI2_0:
; CHECK-FPUV3-NEXT: .long __gnu_h2f_ieee
%a = load half, ptr %p
%r = fpext half %a to double
ret double %r
}
define void @test_fptrunc_float(float %f, ptr %p) nounwind {
; CHECK-FPUV2-LABEL: test_fptrunc_float:
; CHECK-FPUV2: # %bb.0:
; CHECK-FPUV2-NEXT: subi16 sp, sp, 8
; CHECK-FPUV2-NEXT: st16.w l0, (sp, 4) # 4-byte Folded Spill
; CHECK-FPUV2-NEXT: st32.w lr, (sp, 0) # 4-byte Folded Spill
; CHECK-FPUV2-NEXT: mov16 l0, a0
; CHECK-FPUV2-NEXT: jsri32 [.LCPI3_0]
; CHECK-FPUV2-NEXT: st16.h a0, (l0, 0)
; CHECK-FPUV2-NEXT: ld32.w lr, (sp, 0) # 4-byte Folded Reload
; CHECK-FPUV2-NEXT: ld16.w l0, (sp, 4) # 4-byte Folded Reload
; CHECK-FPUV2-NEXT: addi16 sp, sp, 8
; CHECK-FPUV2-NEXT: rts16
; CHECK-FPUV2-NEXT: .p2align 1
; CHECK-FPUV2-NEXT: # %bb.1:
; CHECK-FPUV2-NEXT: .p2align 2, 0x0
; CHECK-FPUV2-NEXT: .LCPI3_0:
; CHECK-FPUV2-NEXT: .long __gnu_f2h_ieee
;
; CHECK-FPUV3-LABEL: test_fptrunc_float:
; CHECK-FPUV3: # %bb.0:
; CHECK-FPUV3-NEXT: subi16 sp, sp, 8
; CHECK-FPUV3-NEXT: st16.w l0, (sp, 4) # 4-byte Folded Spill
; CHECK-FPUV3-NEXT: st32.w lr, (sp, 0) # 4-byte Folded Spill
; CHECK-FPUV3-NEXT: mov16 l0, a0
; CHECK-FPUV3-NEXT: jsri32 [.LCPI3_0]
; CHECK-FPUV3-NEXT: st16.h a0, (l0, 0)
; CHECK-FPUV3-NEXT: ld32.w lr, (sp, 0) # 4-byte Folded Reload
; CHECK-FPUV3-NEXT: ld16.w l0, (sp, 4) # 4-byte Folded Reload
; CHECK-FPUV3-NEXT: addi16 sp, sp, 8
; CHECK-FPUV3-NEXT: rts16
; CHECK-FPUV3-NEXT: .p2align 1
; CHECK-FPUV3-NEXT: # %bb.1:
; CHECK-FPUV3-NEXT: .p2align 2, 0x0
; CHECK-FPUV3-NEXT: .LCPI3_0:
; CHECK-FPUV3-NEXT: .long __gnu_f2h_ieee
%a = fptrunc float %f to half
store half %a, ptr %p
ret void
}
define void @test_fptrunc_double(double %d, ptr %p) nounwind {
; CHECK-FPUV2-LABEL: test_fptrunc_double:
; CHECK-FPUV2: # %bb.0:
; CHECK-FPUV2-NEXT: subi16 sp, sp, 8
; CHECK-FPUV2-NEXT: st16.w l0, (sp, 4) # 4-byte Folded Spill
; CHECK-FPUV2-NEXT: st32.w lr, (sp, 0) # 4-byte Folded Spill
; CHECK-FPUV2-NEXT: mov16 l0, a0
; CHECK-FPUV2-NEXT: jsri32 [.LCPI4_0]
; CHECK-FPUV2-NEXT: st16.h a0, (l0, 0)
; CHECK-FPUV2-NEXT: ld32.w lr, (sp, 0) # 4-byte Folded Reload
; CHECK-FPUV2-NEXT: ld16.w l0, (sp, 4) # 4-byte Folded Reload
; CHECK-FPUV2-NEXT: addi16 sp, sp, 8
; CHECK-FPUV2-NEXT: rts16
; CHECK-FPUV2-NEXT: .p2align 1
; CHECK-FPUV2-NEXT: # %bb.1:
; CHECK-FPUV2-NEXT: .p2align 2, 0x0
; CHECK-FPUV2-NEXT: .LCPI4_0:
; CHECK-FPUV2-NEXT: .long __truncdfhf2
;
; CHECK-FPUV3-LABEL: test_fptrunc_double:
; CHECK-FPUV3: # %bb.0:
; CHECK-FPUV3-NEXT: subi16 sp, sp, 8
; CHECK-FPUV3-NEXT: st16.w l0, (sp, 4) # 4-byte Folded Spill
; CHECK-FPUV3-NEXT: st32.w lr, (sp, 0) # 4-byte Folded Spill
; CHECK-FPUV3-NEXT: mov16 l0, a0
; CHECK-FPUV3-NEXT: jsri32 [.LCPI4_0]
; CHECK-FPUV3-NEXT: st16.h a0, (l0, 0)
; CHECK-FPUV3-NEXT: ld32.w lr, (sp, 0) # 4-byte Folded Reload
; CHECK-FPUV3-NEXT: ld16.w l0, (sp, 4) # 4-byte Folded Reload
; CHECK-FPUV3-NEXT: addi16 sp, sp, 8
; CHECK-FPUV3-NEXT: rts16
; CHECK-FPUV3-NEXT: .p2align 1
; CHECK-FPUV3-NEXT: # %bb.1:
; CHECK-FPUV3-NEXT: .p2align 2, 0x0
; CHECK-FPUV3-NEXT: .LCPI4_0:
; CHECK-FPUV3-NEXT: .long __truncdfhf2
%a = fptrunc double %d to half
store half %a, ptr %p
ret void
}
define void @test_fadd(ptr %p, ptr %q) nounwind {
; CHECK-FPUV2-LABEL: test_fadd:
; CHECK-FPUV2: # %bb.0:
; CHECK-FPUV2-NEXT: subi16 sp, sp, 20
; CHECK-FPUV2-NEXT: fstd vr8, (sp, 12) # 8-byte Folded Spill
; CHECK-FPUV2-NEXT: st16.w l1, (sp, 8) # 4-byte Folded Spill
; CHECK-FPUV2-NEXT: st16.w l0, (sp, 4) # 4-byte Folded Spill
; CHECK-FPUV2-NEXT: st32.w lr, (sp, 0) # 4-byte Folded Spill
; CHECK-FPUV2-NEXT: mov16 l0, a1
; CHECK-FPUV2-NEXT: mov16 l1, a0
; CHECK-FPUV2-NEXT: ld16.h a0, (a0, 0)
; CHECK-FPUV2-NEXT: jsri32 [.LCPI5_0]
; CHECK-FPUV2-NEXT: fmovs vr8, vr0
; CHECK-FPUV2-NEXT: ld16.h a0, (l0, 0)
; CHECK-FPUV2-NEXT: jsri32 [.LCPI5_0]
; CHECK-FPUV2-NEXT: fadds vr0, vr8, vr0
; CHECK-FPUV2-NEXT: jsri32 [.LCPI5_1]
; CHECK-FPUV2-NEXT: st16.h a0, (l1, 0)
; CHECK-FPUV2-NEXT: ld32.w lr, (sp, 0) # 4-byte Folded Reload
; CHECK-FPUV2-NEXT: ld16.w l0, (sp, 4) # 4-byte Folded Reload
; CHECK-FPUV2-NEXT: ld16.w l1, (sp, 8) # 4-byte Folded Reload
; CHECK-FPUV2-NEXT: fldd vr8, (sp, 12) # 8-byte Folded Reload
; CHECK-FPUV2-NEXT: addi16 sp, sp, 20
; CHECK-FPUV2-NEXT: rts16
; CHECK-FPUV2-NEXT: .p2align 1
; CHECK-FPUV2-NEXT: # %bb.1:
; CHECK-FPUV2-NEXT: .p2align 2, 0x0
; CHECK-FPUV2-NEXT: .LCPI5_0:
; CHECK-FPUV2-NEXT: .long __gnu_h2f_ieee
; CHECK-FPUV2-NEXT: .LCPI5_1:
; CHECK-FPUV2-NEXT: .long __gnu_f2h_ieee
;
; CHECK-FPUV3-LABEL: test_fadd:
; CHECK-FPUV3: # %bb.0:
; CHECK-FPUV3-NEXT: subi16 sp, sp, 20
; CHECK-FPUV3-NEXT: fst.64 vr8, (sp, 12) # 8-byte Folded Spill
; CHECK-FPUV3-NEXT: st16.w l1, (sp, 8) # 4-byte Folded Spill
; CHECK-FPUV3-NEXT: st16.w l0, (sp, 4) # 4-byte Folded Spill
; CHECK-FPUV3-NEXT: st32.w lr, (sp, 0) # 4-byte Folded Spill
; CHECK-FPUV3-NEXT: mov16 l0, a1
; CHECK-FPUV3-NEXT: mov16 l1, a0
; CHECK-FPUV3-NEXT: ld16.h a0, (a0, 0)
; CHECK-FPUV3-NEXT: jsri32 [.LCPI5_0]
; CHECK-FPUV3-NEXT: fmov.32 vr8, vr0
; CHECK-FPUV3-NEXT: ld16.h a0, (l0, 0)
; CHECK-FPUV3-NEXT: jsri32 [.LCPI5_0]
; CHECK-FPUV3-NEXT: fadd.32 vr0, vr8, vr0
; CHECK-FPUV3-NEXT: jsri32 [.LCPI5_1]
; CHECK-FPUV3-NEXT: st16.h a0, (l1, 0)
; CHECK-FPUV3-NEXT: ld32.w lr, (sp, 0) # 4-byte Folded Reload
; CHECK-FPUV3-NEXT: ld16.w l0, (sp, 4) # 4-byte Folded Reload
; CHECK-FPUV3-NEXT: ld16.w l1, (sp, 8) # 4-byte Folded Reload
; CHECK-FPUV3-NEXT: fld.64 vr8, (sp, 12) # 8-byte Folded Reload
; CHECK-FPUV3-NEXT: addi16 sp, sp, 20
; CHECK-FPUV3-NEXT: rts16
; CHECK-FPUV3-NEXT: .p2align 1
; CHECK-FPUV3-NEXT: # %bb.1:
; CHECK-FPUV3-NEXT: .p2align 2, 0x0
; CHECK-FPUV3-NEXT: .LCPI5_0:
; CHECK-FPUV3-NEXT: .long __gnu_h2f_ieee
; CHECK-FPUV3-NEXT: .LCPI5_1:
; CHECK-FPUV3-NEXT: .long __gnu_f2h_ieee
%a = load half, ptr %p
%b = load half, ptr %q
%r = fadd half %a, %b
store half %r, ptr %p
ret void
}
define void @test_fmul(ptr %p, ptr %q) nounwind {
; CHECK-FPUV2-LABEL: test_fmul:
; CHECK-FPUV2: # %bb.0:
; CHECK-FPUV2-NEXT: subi16 sp, sp, 20
; CHECK-FPUV2-NEXT: fstd vr8, (sp, 12) # 8-byte Folded Spill
; CHECK-FPUV2-NEXT: st16.w l1, (sp, 8) # 4-byte Folded Spill
; CHECK-FPUV2-NEXT: st16.w l0, (sp, 4) # 4-byte Folded Spill
; CHECK-FPUV2-NEXT: st32.w lr, (sp, 0) # 4-byte Folded Spill
; CHECK-FPUV2-NEXT: mov16 l0, a1
; CHECK-FPUV2-NEXT: mov16 l1, a0
; CHECK-FPUV2-NEXT: ld16.h a0, (a0, 0)
; CHECK-FPUV2-NEXT: jsri32 [.LCPI6_0]
; CHECK-FPUV2-NEXT: fmovs vr8, vr0
; CHECK-FPUV2-NEXT: ld16.h a0, (l0, 0)
; CHECK-FPUV2-NEXT: jsri32 [.LCPI6_0]
; CHECK-FPUV2-NEXT: fmuls vr0, vr8, vr0
; CHECK-FPUV2-NEXT: jsri32 [.LCPI6_1]
; CHECK-FPUV2-NEXT: st16.h a0, (l1, 0)
; CHECK-FPUV2-NEXT: ld32.w lr, (sp, 0) # 4-byte Folded Reload
; CHECK-FPUV2-NEXT: ld16.w l0, (sp, 4) # 4-byte Folded Reload
; CHECK-FPUV2-NEXT: ld16.w l1, (sp, 8) # 4-byte Folded Reload
; CHECK-FPUV2-NEXT: fldd vr8, (sp, 12) # 8-byte Folded Reload
; CHECK-FPUV2-NEXT: addi16 sp, sp, 20
; CHECK-FPUV2-NEXT: rts16
; CHECK-FPUV2-NEXT: .p2align 1
; CHECK-FPUV2-NEXT: # %bb.1:
; CHECK-FPUV2-NEXT: .p2align 2, 0x0
; CHECK-FPUV2-NEXT: .LCPI6_0:
; CHECK-FPUV2-NEXT: .long __gnu_h2f_ieee
; CHECK-FPUV2-NEXT: .LCPI6_1:
; CHECK-FPUV2-NEXT: .long __gnu_f2h_ieee
;
; CHECK-FPUV3-LABEL: test_fmul:
; CHECK-FPUV3: # %bb.0:
; CHECK-FPUV3-NEXT: subi16 sp, sp, 20
; CHECK-FPUV3-NEXT: fst.64 vr8, (sp, 12) # 8-byte Folded Spill
; CHECK-FPUV3-NEXT: st16.w l1, (sp, 8) # 4-byte Folded Spill
; CHECK-FPUV3-NEXT: st16.w l0, (sp, 4) # 4-byte Folded Spill
; CHECK-FPUV3-NEXT: st32.w lr, (sp, 0) # 4-byte Folded Spill
; CHECK-FPUV3-NEXT: mov16 l0, a1
; CHECK-FPUV3-NEXT: mov16 l1, a0
; CHECK-FPUV3-NEXT: ld16.h a0, (a0, 0)
; CHECK-FPUV3-NEXT: jsri32 [.LCPI6_0]
; CHECK-FPUV3-NEXT: fmov.32 vr8, vr0
; CHECK-FPUV3-NEXT: ld16.h a0, (l0, 0)
; CHECK-FPUV3-NEXT: jsri32 [.LCPI6_0]
; CHECK-FPUV3-NEXT: fmul.32 vr0, vr8, vr0
; CHECK-FPUV3-NEXT: jsri32 [.LCPI6_1]
; CHECK-FPUV3-NEXT: st16.h a0, (l1, 0)
; CHECK-FPUV3-NEXT: ld32.w lr, (sp, 0) # 4-byte Folded Reload
; CHECK-FPUV3-NEXT: ld16.w l0, (sp, 4) # 4-byte Folded Reload
; CHECK-FPUV3-NEXT: ld16.w l1, (sp, 8) # 4-byte Folded Reload
; CHECK-FPUV3-NEXT: fld.64 vr8, (sp, 12) # 8-byte Folded Reload
; CHECK-FPUV3-NEXT: addi16 sp, sp, 20
; CHECK-FPUV3-NEXT: rts16
; CHECK-FPUV3-NEXT: .p2align 1
; CHECK-FPUV3-NEXT: # %bb.1:
; CHECK-FPUV3-NEXT: .p2align 2, 0x0
; CHECK-FPUV3-NEXT: .LCPI6_0:
; CHECK-FPUV3-NEXT: .long __gnu_h2f_ieee
; CHECK-FPUV3-NEXT: .LCPI6_1:
; CHECK-FPUV3-NEXT: .long __gnu_f2h_ieee
%a = load half, ptr %p
%b = load half, ptr %q
%r = fmul half %a, %b
store half %r, ptr %p
ret void
}
|
