File: lowering-128.ll

package info (click to toggle)
llvm-toolchain-17 1%3A17.0.6-22
  • links: PTS, VCS
  • area: main
  • in suites: forky, sid, trixie
  • size: 1,799,624 kB
  • sloc: cpp: 6,428,607; ansic: 1,383,196; asm: 793,408; python: 223,504; objc: 75,364; f90: 60,502; lisp: 33,869; pascal: 15,282; sh: 9,684; perl: 7,453; ml: 4,937; awk: 3,523; makefile: 2,889; javascript: 2,149; xml: 888; fortran: 619; cs: 573
file content (22 lines) | stat: -rw-r--r-- 641 bytes parent folder | download | duplicates (12)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
; RUN: llc -march=lanai < %s | FileCheck %s

; Tests that lowering wide registers (128 bits or more) works on Lanai.
; The emitted assembly is not checked, we just do a smoketest.

target datalayout = "E-m:e-p:32:32-i64:64-a:0:32-n32-S64"
target triple = "lanai"

; CHECK-LABEL: add128:
define i128 @add128(i128 %x, i128 %y) {
  %a = add i128 %x, %y
  ret i128 %a
}

; CHECK-LABEL: immshift128:
define i128 @immshift128(i1 %sel) unnamed_addr {
  %a = add i128 0, 340282366920938463463374007431768209319
  %b = add i128 0, 340282366920938463463374607431768209320
  %c = select i1 %sel, i128 %a, i128 %b
  %d = shl i128 %a, 10
  ret i128 %d
}