File: extract-vector-elt-zEC12.ll

package info (click to toggle)
llvm-toolchain-17 1%3A17.0.6-22
  • links: PTS, VCS
  • area: main
  • in suites: forky, sid, trixie
  • size: 1,799,624 kB
  • sloc: cpp: 6,428,607; ansic: 1,383,196; asm: 793,408; python: 223,504; objc: 75,364; f90: 60,502; lisp: 33,869; pascal: 15,282; sh: 9,684; perl: 7,453; ml: 4,937; awk: 3,523; makefile: 2,889; javascript: 2,149; xml: 888; fortran: 619; cs: 573
file content (21 lines) | stat: -rw-r--r-- 731 bytes parent folder | download | duplicates (12) 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
 
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=zEC12 | FileCheck %s
;
; Test that <1 x i8> is legalized properly without vector support.

define void @autogen_SD18500(ptr) {
; CHECK: .text
BB:
  %L5 = load i8, ptr %0
  %I22 = insertelement <1 x i8> undef, i8 %L5, i32 0
  %Cmp53 = icmp ule i1 undef, undef
  br label %CF244

CF244:                                            ; preds = %CF244, %BB
  %Sl119 = select i1 %Cmp53, <1 x i8> %I22, <1 x i8> undef
  %Cmp148 = fcmp une float 0x3E03A81780000000, 0x42D92DCD00000000
  br i1 %Cmp148, label %CF244, label %CF241

CF241:                                            ; preds = %CF241, %CF244
  %Sl199 = select i1 true, <1 x i8> %Sl119, <1 x i8> zeroinitializer
  br label %CF241
}