File: vec-move-03.ll

package info (click to toggle)
llvm-toolchain-17 1%3A17.0.6-22
  • links: PTS, VCS
  • area: main
  • in suites: forky, sid, trixie
  • size: 1,799,624 kB
  • sloc: cpp: 6,428,607; ansic: 1,383,196; asm: 793,408; python: 223,504; objc: 75,364; f90: 60,502; lisp: 33,869; pascal: 15,282; sh: 9,684; perl: 7,453; ml: 4,937; awk: 3,523; makefile: 2,889; javascript: 2,149; xml: 888; fortran: 619; cs: 573
file content (213 lines) | stat: -rw-r--r-- 4,810 bytes parent folder | download | duplicates (12)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
; Test vector stores.
;
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s

; Test v16i8 stores.
define void @f1(<16 x i8> %val, ptr %ptr) {
; CHECK-LABEL: f1:
; CHECK: vst %v24, 0(%r2), 3
; CHECK: br %r14
  store <16 x i8> %val, ptr %ptr
  ret void
}

; Test v8i16 stores.
define void @f2(<8 x i16> %val, ptr %ptr) {
; CHECK-LABEL: f2:
; CHECK: vst %v24, 0(%r2), 3
; CHECK: br %r14
  store <8 x i16> %val, ptr %ptr
  ret void
}

; Test v4i32 stores.
define void @f3(<4 x i32> %val, ptr %ptr) {
; CHECK-LABEL: f3:
; CHECK: vst %v24, 0(%r2), 3
; CHECK: br %r14
  store <4 x i32> %val, ptr %ptr
  ret void
}

; Test v2i64 stores.
define void @f4(<2 x i64> %val, ptr %ptr) {
; CHECK-LABEL: f4:
; CHECK: vst %v24, 0(%r2), 3
; CHECK: br %r14
  store <2 x i64> %val, ptr %ptr
  ret void
}

; Test v4f32 stores.
define void @f5(<4 x float> %val, ptr %ptr) {
; CHECK-LABEL: f5:
; CHECK: vst %v24, 0(%r2), 3
; CHECK: br %r14
  store <4 x float> %val, ptr %ptr
  ret void
}

; Test v2f64 stores.
define void @f6(<2 x double> %val, ptr %ptr) {
; CHECK-LABEL: f6:
; CHECK: vst %v24, 0(%r2), 3
; CHECK: br %r14
  store <2 x double> %val, ptr %ptr
  ret void
}

; Test the highest aligned in-range offset.
define void @f7(<16 x i8> %val, ptr %base) {
; CHECK-LABEL: f7:
; CHECK: vst %v24, 4080(%r2), 3
; CHECK: br %r14
  %ptr = getelementptr <16 x i8>, ptr %base, i64 255
  store <16 x i8> %val, ptr %ptr
  ret void
}

; Test the highest unaligned in-range offset.
define void @f8(<16 x i8> %val, ptr %base) {
; CHECK-LABEL: f8:
; CHECK: vst %v24, 4095(%r2)
; CHECK: br %r14
  %addr = getelementptr i8, ptr %base, i64 4095
  store <16 x i8> %val, ptr %addr, align 1
  ret void
}

; Test the next offset up, which requires separate address logic,
define void @f9(<16 x i8> %val, ptr %base) {
; CHECK-LABEL: f9:
; CHECK: aghi %r2, 4096
; CHECK: vst %v24, 0(%r2), 3
; CHECK: br %r14
  %ptr = getelementptr <16 x i8>, ptr %base, i64 256
  store <16 x i8> %val, ptr %ptr
  ret void
}

; Test negative offsets, which also require separate address logic,
define void @f10(<16 x i8> %val, ptr %base) {
; CHECK-LABEL: f10:
; CHECK: aghi %r2, -16
; CHECK: vst %v24, 0(%r2), 3
; CHECK: br %r14
  %ptr = getelementptr <16 x i8>, ptr %base, i64 -1
  store <16 x i8> %val, ptr %ptr
  ret void
}

; Check that indexes are allowed.
define void @f11(<16 x i8> %val, ptr %base, i64 %index) {
; CHECK-LABEL: f11:
; CHECK: vst %v24, 0(%r3,%r2)
; CHECK: br %r14
  %addr = getelementptr i8, ptr %base, i64 %index
  store <16 x i8> %val, ptr %addr, align 1
  ret void
}

; Test v2i8 stores.
define void @f12(<2 x i8> %val, ptr %ptr) {
; CHECK-LABEL: f12:
; CHECK: vsteh %v24, 0(%r2), 0
; CHECK: br %r14
  store <2 x i8> %val, ptr %ptr
  ret void
}

; Test v4i8 stores.
define void @f13(<4 x i8> %val, ptr %ptr) {
; CHECK-LABEL: f13:
; CHECK: vstef %v24, 0(%r2)
; CHECK: br %r14
  store <4 x i8> %val, ptr %ptr
  ret void
}

; Test v8i8 stores.
define void @f14(<8 x i8> %val, ptr %ptr) {
; CHECK-LABEL: f14:
; CHECK: vsteg %v24, 0(%r2)
; CHECK: br %r14
  store <8 x i8> %val, ptr %ptr
  ret void
}

; Test v2i16 stores.
define void @f15(<2 x i16> %val, ptr %ptr) {
; CHECK-LABEL: f15:
; CHECK: vstef %v24, 0(%r2), 0
; CHECK: br %r14
  store <2 x i16> %val, ptr %ptr
  ret void
}

; Test v4i16 stores.
define void @f16(<4 x i16> %val, ptr %ptr) {
; CHECK-LABEL: f16:
; CHECK: vsteg %v24, 0(%r2)
; CHECK: br %r14
  store <4 x i16> %val, ptr %ptr
  ret void
}

; Test v2i32 stores.
define void @f17(<2 x i32> %val, ptr %ptr) {
; CHECK-LABEL: f17:
; CHECK: vsteg %v24, 0(%r2), 0
; CHECK: br %r14
  store <2 x i32> %val, ptr %ptr
  ret void
}

; Test v2f32 stores.
define void @f18(<2 x float> %val, ptr %ptr) {
; CHECK-LABEL: f18:
; CHECK: vsteg %v24, 0(%r2), 0
; CHECK: br %r14
  store <2 x float> %val, ptr %ptr
  ret void
}

; Test quadword-aligned stores.
define void @f19(<16 x i8> %val, ptr %ptr) {
; CHECK-LABEL: f19:
; CHECK: vst %v24, 0(%r2), 4
; CHECK: br %r14
  store <16 x i8> %val, ptr %ptr, align 16
  ret void
}

; Test that the alignment hint for VST is emitted also when CFG optimizer
; replaces two VSTs with just one that then carries two memoperands.
define void @f20() {
; CHECK-LABEL: f20:
; CHECK: vst %v0, 0(%r1), 3
; CHECK-NOT: vst
entry:
  switch i32 undef, label %exit [
    i32 1, label %bb1
    i32 2, label %bb2
  ]

bb1:
  %C1 = call ptr @foo()
  %I1 = insertelement <2 x ptr> poison, ptr %C1, i64 0
  %S1 = shufflevector <2 x ptr> %I1, <2 x ptr> poison, <2 x i32> zeroinitializer
  store <2 x ptr> %S1, ptr undef, align 8
  br label %exit

bb2:
  %C2 = call ptr @foo()
  %I2 = insertelement <2 x ptr> poison, ptr %C2, i64 0
  %S2 = shufflevector <2 x ptr> %I2, <2 x ptr> poison, <2 x i32> zeroinitializer
  store <2 x ptr> %S2, ptr undef, align 8
  br label %exit

exit:
  ret void
}

declare ptr @foo()