1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
|
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
define i32 @t1(i32 %a, i32 %b, i32 %c) nounwind {
; CHECK-LABEL: t1:
; CHECK: @ %bb.0:
; CHECK-NEXT: mov r0, r1
; CHECK-NEXT: mvn r1, #-2147483648
; CHECK-NEXT: cmp r2, #10
; CHECK-NEXT: it le
; CHECK-NEXT: addle r0, r1
; CHECK-NEXT: bx lr
%tmp1 = icmp sgt i32 %c, 10
%tmp2 = select i1 %tmp1, i32 0, i32 2147483647
%tmp3 = add i32 %tmp2, %b
ret i32 %tmp3
}
define i32 @t2(i32 %a, i32 %b, i32 %c) nounwind {
; CHECK-LABEL: t2:
; CHECK: @ %bb.0:
; CHECK-NEXT: mov r0, r1
; CHECK-NEXT: cmp r2, #10
; CHECK-NEXT: it le
; CHECK-NEXT: addle.w r0, r0, #-2147483648
; CHECK-NEXT: bx lr
%tmp1 = icmp sgt i32 %c, 10
%tmp2 = select i1 %tmp1, i32 0, i32 2147483648
%tmp3 = add i32 %tmp2, %b
ret i32 %tmp3
}
define i32 @t3(i32 %a, i32 %b, i32 %c, i32 %d) nounwind {
; CHECK-LABEL: t3:
; CHECK: @ %bb.0:
; CHECK-NEXT: mov r0, r1
; CHECK-NEXT: cmp r2, #10
; CHECK-NEXT: it le
; CHECK-NEXT: suble r0, #10
; CHECK-NEXT: bx lr
%tmp1 = icmp sgt i32 %c, 10
%tmp2 = select i1 %tmp1, i32 0, i32 10
%tmp3 = sub i32 %b, %tmp2
ret i32 %tmp3
}
|
