1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
|
; RUN: llc < %s -stack-symbol-ordering=0 -mcpu=generic -mattr=+avx -mtriple=x86_64-apple-darwin10 | FileCheck %s
; rdar://11496434
; no VLAs or dynamic alignment
define i32 @t1() nounwind uwtable ssp {
entry:
%a = alloca i32, align 4
call void @t1_helper(ptr %a) nounwind
%0 = load i32, ptr %a, align 4
%add = add nsw i32 %0, 13
ret i32 %add
; CHECK: _t1
; CHECK-NOT: andq $-{{[0-9]+}}, %rsp
; CHECK: leaq [[OFFSET:[0-9]*]](%rsp), %rdi
; CHECK: callq _t1_helper
; CHECK: movl [[OFFSET]](%rsp), %eax
; CHECK: addl $13, %eax
}
declare void @t1_helper(ptr)
; dynamic realignment
define i32 @t2() nounwind uwtable ssp {
entry:
%a = alloca i32, align 4
%v = alloca <8 x float>, align 32
call void @t2_helper(ptr %a, ptr %v) nounwind
%0 = load i32, ptr %a, align 4
%add = add nsw i32 %0, 13
ret i32 %add
; CHECK: _t2
; CHECK: pushq %rbp
; CHECK: movq %rsp, %rbp
; CHECK: andq $-32, %rsp
; CHECK: subq ${{[0-9]+}}, %rsp
;
; CHECK: leaq {{[0-9]*}}(%rsp), %rdi
; CHECK: movq %rsp, %rsi
; CHECK: callq _t2_helper
;
; CHECK: movq %rbp, %rsp
; CHECK: popq %rbp
}
declare void @t2_helper(ptr, ptr)
; VLAs
define i32 @t3(i64 %sz) nounwind uwtable ssp {
entry:
%a = alloca i32, align 4
%vla = alloca i32, i64 %sz, align 16
call void @t3_helper(ptr %a, ptr %vla) nounwind
%0 = load i32, ptr %a, align 4
%add = add nsw i32 %0, 13
ret i32 %add
; CHECK: _t3
; CHECK: pushq %rbp
; CHECK: movq %rsp, %rbp
; CHECK-NOT: andq $-{{[0-9]+}}, %rsp
; CHECK: subq ${{[0-9]+}}, %rsp
;
; CHECK: movq %rbp, %rsp
; CHECK: popq %rbp
}
declare void @t3_helper(ptr, ptr)
; VLAs + Dynamic realignment
define i32 @t4(i64 %sz) nounwind uwtable ssp {
entry:
%a = alloca i32, align 4
%v = alloca <8 x float>, align 32
%vla = alloca i32, i64 %sz, align 16
call void @t4_helper(ptr %a, ptr %vla, ptr %v) nounwind
%0 = load i32, ptr %a, align 4
%add = add nsw i32 %0, 13
ret i32 %add
; CHECK: _t4
; CHECK: pushq %rbp
; CHECK: movq %rsp, %rbp
; CHECK: pushq %rbx
; CHECK: andq $-32, %rsp
; CHECK: subq ${{[0-9]+}}, %rsp
; CHECK: movq %rsp, %rbx
;
; CHECK: leaq {{[0-9]*}}(%rbx), %rdi
; CHECK: movq %rbx, %rdx
; CHECK: callq _t4_helper
;
; CHECK: leaq -{{[0-9]+}}(%rbp), %rsp
; CHECK: popq %rbx
; CHECK: popq %rbp
}
declare void @t4_helper(ptr, ptr, ptr)
; Spilling an AVX register shouldn't cause dynamic realignment
define i32 @t5(ptr nocapture %f) nounwind uwtable ssp {
entry:
%a = alloca i32, align 4
%0 = load <8 x float>, ptr %f, align 32
call void @t5_helper1(ptr %a) nounwind
call void @t5_helper2(<8 x float> %0) nounwind
%1 = load i32, ptr %a, align 4
%add = add nsw i32 %1, 13
ret i32 %add
; CHECK: _t5
; CHECK: subq ${{[0-9]+}}, %rsp
;
; CHECK: vmovaps (%rdi), [[AVXREG:%ymm[0-9]+]]
; CHECK: vmovups [[AVXREG]], (%rsp)
; CHECK: leaq {{[0-9]+}}(%rsp), %rdi
; CHECK: callq _t5_helper1
; CHECK: vmovups (%rsp), %ymm0
; CHECK: callq _t5_helper2
; CHECK: movl {{[0-9]+}}(%rsp), %eax
}
declare void @t5_helper1(ptr)
declare void @t5_helper2(<8 x float>)
; VLAs + Dynamic realignment + Spill
; FIXME: RA has already reserved RBX, so we can't do dynamic realignment.
define i32 @t6(i64 %sz, ptr nocapture %f) nounwind uwtable ssp {
entry:
; CHECK: _t6
%a = alloca i32, align 4
%0 = load <8 x float>, ptr %f, align 32
%vla = alloca i32, i64 %sz, align 16
call void @t6_helper1(ptr %a, ptr %vla) nounwind
call void @t6_helper2(<8 x float> %0) nounwind
%1 = load i32, ptr %a, align 4
%add = add nsw i32 %1, 13
ret i32 %add
}
declare void @t6_helper1(ptr, ptr)
declare void @t6_helper2(<8 x float>)
; VLAs + Dynamic realignment + byval
; The byval adjust the sp after the prolog, but if we're restoring the sp from
; the base pointer we use the original adjustment.
%struct.struct_t = type { [5 x i32] }
define void @t7(i32 %size, ptr byval(%struct.struct_t) align 8 %arg1) nounwind uwtable {
entry:
%x = alloca i32, align 32
store i32 0, ptr %x, align 32
%0 = zext i32 %size to i64
%vla = alloca i32, i64 %0, align 16
%1 = load i32, ptr %x, align 32
call void @bar(i32 %1, ptr %vla, ptr byval(%struct.struct_t) align 8 %arg1)
ret void
; CHECK: _t7
; CHECK: pushq %rbp
; CHECK: movq %rsp, %rbp
; CHECK: pushq %rbx
; CHECK: andq $-32, %rsp
; CHECK: subq ${{[0-9]+}}, %rsp
; CHECK: movq %rsp, %rbx
; Stack adjustment for byval
; CHECK: subq {{.*}}, %rsp
; CHECK: callq _bar
; CHECK-NOT: addq {{.*}}, %rsp
; CHECK: leaq -8(%rbp), %rsp
; CHECK: popq %rbx
; CHECK: popq %rbp
}
declare ptr @llvm.stacksave() nounwind
declare void @bar(i32, ptr, ptr byval(%struct.struct_t) align 8)
declare void @llvm.stackrestore(ptr) nounwind
|
