1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
|
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i686-unknown -mattr=+lwp | FileCheck %s --check-prefixes=X86,X86_LWP
; RUN: llc < %s -mtriple=i686-unknown -mcpu=bdver1 | FileCheck %s --check-prefixes=X86,X86_BDVER1
; RUN: llc < %s -mtriple=i686-unknown -mcpu=bdver2 | FileCheck %s --check-prefixes=X86,X86_BDVER2
; RUN: llc < %s -mtriple=i686-unknown -mcpu=bdver3 | FileCheck %s --check-prefixes=X86,X86_BDVER3
; RUN: llc < %s -mtriple=i686-unknown -mcpu=bdver4 | FileCheck %s --check-prefixes=X86,X86_BDVER4
; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+lwp | FileCheck %s --check-prefix=X64
; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=bdver1 | FileCheck %s --check-prefix=X64
; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=bdver2 | FileCheck %s --check-prefix=X64
; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=bdver3 | FileCheck %s --check-prefix=X64
; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=bdver4 | FileCheck %s --check-prefix=X64
define void @test_llwpcb(ptr%a0) nounwind {
; X86-LABEL: test_llwpcb:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: llwpcb %eax
; X86-NEXT: retl
;
; X64-LABEL: test_llwpcb:
; X64: # %bb.0:
; X64-NEXT: llwpcb %rdi
; X64-NEXT: retq
tail call void @llvm.x86.llwpcb(ptr%a0)
ret void
}
define ptr @test_slwpcb(ptr%a0) nounwind {
; X86-LABEL: test_slwpcb:
; X86: # %bb.0:
; X86-NEXT: slwpcb %eax
; X86-NEXT: retl
;
; X64-LABEL: test_slwpcb:
; X64: # %bb.0:
; X64-NEXT: slwpcb %rax
; X64-NEXT: retq
%1 = tail call ptr @llvm.x86.slwpcb()
ret ptr%1
}
define i8 @test_lwpins32_rri(i32 %a0, i32 %a1) nounwind {
; X86_LWP-LABEL: test_lwpins32_rri:
; X86_LWP: # %bb.0:
; X86_LWP-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86_LWP-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86_LWP-NEXT: addl %ecx, %ecx
; X86_LWP-NEXT: lwpins $-1985229329, %ecx, %eax # imm = 0x89ABCDEF
; X86_LWP-NEXT: setb %al
; X86_LWP-NEXT: retl
;
; X86_BDVER1-LABEL: test_lwpins32_rri:
; X86_BDVER1: # %bb.0:
; X86_BDVER1-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86_BDVER1-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86_BDVER1-NEXT: addl %ecx, %ecx
; X86_BDVER1-NEXT: lwpins $-1985229329, %ecx, %eax # imm = 0x89ABCDEF
; X86_BDVER1-NEXT: setb %al
; X86_BDVER1-NEXT: retl
;
; X86_BDVER2-LABEL: test_lwpins32_rri:
; X86_BDVER2: # %bb.0:
; X86_BDVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86_BDVER2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86_BDVER2-NEXT: addl %ecx, %ecx
; X86_BDVER2-NEXT: lwpins $-1985229329, %ecx, %eax # imm = 0x89ABCDEF
; X86_BDVER2-NEXT: setb %al
; X86_BDVER2-NEXT: retl
;
; X86_BDVER3-LABEL: test_lwpins32_rri:
; X86_BDVER3: # %bb.0:
; X86_BDVER3-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86_BDVER3-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86_BDVER3-NEXT: addl %ecx, %ecx
; X86_BDVER3-NEXT: lwpins $-1985229329, %ecx, %eax # imm = 0x89ABCDEF
; X86_BDVER3-NEXT: setb %al
; X86_BDVER3-NEXT: retl
;
; X86_BDVER4-LABEL: test_lwpins32_rri:
; X86_BDVER4: # %bb.0:
; X86_BDVER4-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86_BDVER4-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86_BDVER4-NEXT: addl %ecx, %ecx
; X86_BDVER4-NEXT: lwpins $-1985229329, %ecx, %eax # imm = 0x89ABCDEF
; X86_BDVER4-NEXT: setb %al
; X86_BDVER4-NEXT: retl
;
; X64-LABEL: test_lwpins32_rri:
; X64: # %bb.0:
; X64-NEXT: addl %esi, %esi
; X64-NEXT: lwpins $-1985229329, %esi, %edi # imm = 0x89ABCDEF
; X64-NEXT: setb %al
; X64-NEXT: retq
%1 = add i32 %a1, %a1
%2 = tail call i8 @llvm.x86.lwpins32(i32 %a0, i32 %1, i32 2309737967)
ret i8 %2
}
define i8 @test_lwpins32_rmi(i32 %a0, ptr%p1) nounwind {
; X86-LABEL: test_lwpins32_rmi:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: lwpins $1985229328, (%eax), %ecx # imm = 0x76543210
; X86-NEXT: setb %al
; X86-NEXT: retl
;
; X64-LABEL: test_lwpins32_rmi:
; X64: # %bb.0:
; X64-NEXT: lwpins $1985229328, (%rsi), %edi # imm = 0x76543210
; X64-NEXT: setb %al
; X64-NEXT: retq
%a1 = load i32, ptr%p1
%1 = tail call i8 @llvm.x86.lwpins32(i32 %a0, i32 %a1, i32 1985229328)
ret i8 %1
}
define void @test_lwpval32_rri(i32 %a0, i32 %a1) nounwind {
; X86_LWP-LABEL: test_lwpval32_rri:
; X86_LWP: # %bb.0:
; X86_LWP-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86_LWP-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86_LWP-NEXT: addl %ecx, %ecx
; X86_LWP-NEXT: lwpval $-19088744, %ecx, %eax # imm = 0xFEDCBA98
; X86_LWP-NEXT: retl
;
; X86_BDVER1-LABEL: test_lwpval32_rri:
; X86_BDVER1: # %bb.0:
; X86_BDVER1-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86_BDVER1-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86_BDVER1-NEXT: addl %ecx, %ecx
; X86_BDVER1-NEXT: lwpval $-19088744, %ecx, %eax # imm = 0xFEDCBA98
; X86_BDVER1-NEXT: retl
;
; X86_BDVER2-LABEL: test_lwpval32_rri:
; X86_BDVER2: # %bb.0:
; X86_BDVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86_BDVER2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86_BDVER2-NEXT: addl %ecx, %ecx
; X86_BDVER2-NEXT: lwpval $-19088744, %ecx, %eax # imm = 0xFEDCBA98
; X86_BDVER2-NEXT: retl
;
; X86_BDVER3-LABEL: test_lwpval32_rri:
; X86_BDVER3: # %bb.0:
; X86_BDVER3-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86_BDVER3-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86_BDVER3-NEXT: addl %ecx, %ecx
; X86_BDVER3-NEXT: lwpval $-19088744, %ecx, %eax # imm = 0xFEDCBA98
; X86_BDVER3-NEXT: retl
;
; X86_BDVER4-LABEL: test_lwpval32_rri:
; X86_BDVER4: # %bb.0:
; X86_BDVER4-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86_BDVER4-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86_BDVER4-NEXT: addl %ecx, %ecx
; X86_BDVER4-NEXT: lwpval $-19088744, %ecx, %eax # imm = 0xFEDCBA98
; X86_BDVER4-NEXT: retl
;
; X64-LABEL: test_lwpval32_rri:
; X64: # %bb.0:
; X64-NEXT: addl %esi, %esi
; X64-NEXT: lwpval $-19088744, %esi, %edi # imm = 0xFEDCBA98
; X64-NEXT: retq
%1 = add i32 %a1, %a1
tail call void @llvm.x86.lwpval32(i32 %a0, i32 %1, i32 4275878552)
ret void
}
define void @test_lwpval32_rmi(i32 %a0, ptr%p1) nounwind {
; X86-LABEL: test_lwpval32_rmi:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: lwpval $305419896, (%eax), %ecx # imm = 0x12345678
; X86-NEXT: retl
;
; X64-LABEL: test_lwpval32_rmi:
; X64: # %bb.0:
; X64-NEXT: lwpval $305419896, (%rsi), %edi # imm = 0x12345678
; X64-NEXT: retq
%a1 = load i32, ptr%p1
tail call void @llvm.x86.lwpval32(i32 %a0, i32 %a1, i32 305419896)
ret void
}
declare void @llvm.x86.llwpcb(ptr) nounwind
declare ptr @llvm.x86.slwpcb() nounwind
declare i8 @llvm.x86.lwpins32(i32, i32, i32) nounwind
declare void @llvm.x86.lwpval32(i32, i32, i32) nounwind
|
