File: merge-consecutive-stores.ll

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llvm-toolchain-17 1%3A17.0.6-22
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s

; Make sure that we are zeroing one memory location at a time using xorl and
; not both using XMM registers.

define i32 @foo (ptr %so) nounwind uwtable ssp {
; CHECK-LABEL: foo:
; CHECK:       # %bb.0:
; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT:    movl $0, 28(%eax)
; CHECK-NEXT:    movl $0, 24(%eax)
; CHECK-NEXT:    xorl %ecx, %ecx
; CHECK-NEXT:    cmpl 16(%eax), %ecx
; CHECK-NEXT:    movl $0, 16(%eax)
; CHECK-NEXT:    sbbl 20(%eax), %ecx
; CHECK-NEXT:    movl $0, 20(%eax)
; CHECK-NEXT:    setl %al
; CHECK-NEXT:    movzbl %al, %eax
; CHECK-NEXT:    negl %eax
; CHECK-NEXT:    retl
  %used = getelementptr inbounds i64, ptr %so, i32 3
  store i64 0, ptr %used, align 8
  %fill = getelementptr inbounds i64, ptr %so, i32 2
  %L = load i64, ptr %fill, align 8
  store i64 0, ptr %fill, align 8
  %cmp28 = icmp sgt i64 %L, 0
  %R = sext i1 %cmp28 to i32
  ret i32 %R
}