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|
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -x mir -run-pass fixup-statepoint-caller-saved -verify-machineinstrs < %s | FileCheck %s
--- |
; ModuleID = 'undef.ll'
source_filename = "test_undef.ll"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
define void @test_undef(ptr addrspace(1) %arg1, ptr addrspace(1) %arg2, ptr addrspace(1) %arg3, ptr addrspace(1) %arg4) #0 gc "statepoint-example" {
bb:
%tmp1 = lshr i32 0, undef
%tmp2 = load atomic i32, ptr addrspace(1) undef unordered, align 8
%tmp3 = load atomic i32, ptr addrspace(1) undef unordered, align 8
%tmp19 = inttoptr i64 undef to ptr addrspace(1)
br label %bb7
bb7: ; preds = %bb
%tmp4 = icmp slt i32 %tmp3, undef
%tmp5 = select i1 %tmp4, i32 6, i32 undef
%tmp6 = add i32 %tmp5, %tmp2
%tmp7 = call ptr addrspace(1) @wombat()
%tmp20 = call token (i64, i32, ptr, i32, i32, ...) @llvm.experimental.gc.statepoint.p0(i64 2, i32 5, ptr nonnull elementtype(void (ptr addrspace(1), i32, i32, ptr addrspace(1), i32)) @hoge, i32 5, i32 0, ptr addrspace(1) %tmp19, i32 %tmp2, i32 %tmp6, ptr addrspace(1) %tmp7, i32 0, i32 0, i32 0) [ "deopt"(ptr addrspace(1) %tmp19, ptr addrspace(1) %arg1, ptr addrspace(1) %arg3, ptr addrspace(1) %arg4, i32 %tmp2, i32 %tmp1, i32 %tmp5), "gc-live"(ptr addrspace(1) %tmp19, ptr addrspace(1) %arg2) ]
%tmp21 = call coldcc ptr addrspace(1) @llvm.experimental.gc.relocate.p1(token %tmp20, i32 0, i32 0) ; (%tmp19, %tmp19)
%tmp22 = call coldcc ptr addrspace(1) @llvm.experimental.gc.relocate.p1(token %tmp20, i32 1, i32 1) ; (%arg2, %arg2)
ret void
}
declare void @hoge(ptr addrspace(1), i32, i32, ptr addrspace(1), i32) #0
declare ptr addrspace(1) @wombat() #0
; Function Attrs: nounwind readonly
declare ptr addrspace(1) @llvm.experimental.gc.relocate.p1(token, i32 immarg, i32 immarg) #1
declare token @llvm.experimental.gc.statepoint.p0(i64 immarg, i32 immarg, ptr, i32 immarg, i32 immarg, ...)
attributes #0 = { "target-cpu"="broadwell" }
attributes #1 = { nounwind readonly }
...
---
name: test_undef
alignment: 16
exposesReturnsTwice: false
legalized: false
regBankSelected: false
selected: false
failedISel: false
tracksRegLiveness: true
hasWinCFI: false
registers: []
liveins:
- { reg: '$rdi', virtual-reg: '' }
- { reg: '$rsi', virtual-reg: '' }
- { reg: '$rdx', virtual-reg: '' }
- { reg: '$rcx', virtual-reg: '' }
frameInfo:
isFrameAddressTaken: false
isReturnAddressTaken: false
hasStackMap: false
hasPatchPoint: false
stackSize: 0
offsetAdjustment: 0
maxAlignment: 8
adjustsStack: false
hasCalls: true
stackProtector: ''
maxCallFrameSize: 4294967295
cvBytesOfCalleeSavedRegisters: 0
hasOpaqueSPAdjustment: false
hasVAStart: false
hasMustTailInVarArgFunc: false
localFrameSize: 0
savePoint: ''
restorePoint: ''
fixedStack: []
stack:
- { id: 0, name: '', type: default, offset: 0, size: 8, alignment: 8,
stack-id: default, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 1, name: '', type: default, offset: 0, size: 8, alignment: 8,
stack-id: default, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 2, name: '', type: default, offset: 0, size: 8, alignment: 8,
stack-id: default, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
callSites: []
debugValueSubstitutions: []
constants: []
machineFunctionInfo: {}
body: |
; CHECK-LABEL: name: test_undef
; CHECK: bb.0.bb:
; CHECK: successors: %bb.1(0x80000000)
; CHECK: liveins: $rcx, $rdi, $rdx, $rsi
; CHECK: renamable $r15 = COPY $rcx
; CHECK: renamable $r12 = COPY $rdx
; CHECK: renamable $r14 = COPY $rsi
; CHECK: renamable $r13 = COPY $rdi
; CHECK: renamable $ebx = MOV32rm undef renamable $rax, 1, $noreg, 0, $noreg, implicit-def $rbx :: (load unordered (s32) from `ptr addrspace(1) undef`, align 8, addrspace 1)
; CHECK: bb.1.bb7:
; CHECK: liveins: $rbx, $r12, $r13, $r14, $r15
; CHECK: renamable $ebp = LEA64_32r renamable $rbx, 1, $noreg, 6, $noreg
; CHECK: ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
; CHECK: CALL64pcrel32 target-flags(x86-plt) @wombat, csr_64, implicit $rsp, implicit $ssp, implicit-def $rsp, implicit-def $ssp, implicit-def $rax
; CHECK: ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
; CHECK: MOV64mr %stack.0, 1, $noreg, 0, $noreg, killed renamable $r13 :: (store (s64) into %stack.0)
; CHECK: MOV64mr %stack.1, 1, $noreg, 0, $noreg, killed renamable $r12 :: (store (s64) into %stack.1)
; CHECK: MOV64mr %stack.2, 1, $noreg, 0, $noreg, killed renamable $r15 :: (store (s64) into %stack.2)
; CHECK: ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
; CHECK: $esi = COPY renamable $ebx
; CHECK: $edx = COPY killed renamable $ebp
; CHECK: $rcx = COPY killed renamable $rax
; CHECK: $r8d = MOV32r0 implicit-def dead $eflags
; CHECK: MOV64mr %stack.3, 1, $noreg, 0, $noreg, killed $r14 :: (store (s64) into %stack.3)
; CHECK: STATEPOINT 2, 5, 5, undef renamable $rax, undef $rdi, $esi, $edx, $rcx, killed $r8d, 2, 0, 2, 0, 2, 7, undef renamable $rax, 1, 8, %stack.0, 0, 1, 8, %stack.1, 0, 1, 8, %stack.2, 0, renamable $ebx, undef renamable $eax, 2, 6, 2, 2, 1, 8, %stack.3, 0, undef renamable $rbx, 2, 0, 2, 2, 0, 0, 1, 1, csr_64, implicit-def $rsp, implicit-def $ssp, implicit killed $rbx :: (volatile load store (s64) on %stack.0), (volatile load store (s64) on %stack.1), (volatile load store (s64) on %stack.2), (load store (s64) on %stack.3)
; CHECK: $r14 = MOV64rm %stack.3, 1, $noreg, 0, $noreg :: (load (s64) from %stack.3)
; CHECK: ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
; CHECK: RET 0
bb.0.bb:
successors: %bb.1(0x80000000)
liveins: $rcx, $rdi, $rdx, $rsi
renamable $r15 = COPY $rcx
renamable $r12 = COPY $rdx
renamable $r14 = COPY $rsi
renamable $r13 = COPY $rdi
renamable $ebx = MOV32rm undef renamable $rax, 1, $noreg, 0, $noreg, implicit-def $rbx :: (load unordered (s32) from `ptr addrspace(1) undef`, align 8, addrspace 1)
bb.1.bb7:
liveins: $rbx, $r12, $r13, $r14, $r15
renamable $ebp = LEA64_32r renamable $rbx, 1, $noreg, 6, $noreg
ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
CALL64pcrel32 target-flags(x86-plt) @wombat, csr_64, implicit $rsp, implicit $ssp, implicit-def $rsp, implicit-def $ssp, implicit-def $rax
ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
MOV64mr %stack.0, 1, $noreg, 0, $noreg, killed renamable $r13 :: (store (s64) into %stack.0)
MOV64mr %stack.1, 1, $noreg, 0, $noreg, killed renamable $r12 :: (store (s64) into %stack.1)
MOV64mr %stack.2, 1, $noreg, 0, $noreg, killed renamable $r15 :: (store (s64) into %stack.2)
ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
$esi = COPY renamable $ebx
$edx = COPY killed renamable $ebp
$rcx = COPY killed renamable $rax
$r8d = MOV32r0 implicit-def dead $eflags
dead renamable $r14, dead renamable $rbx = STATEPOINT 2, 5, 5, undef renamable $rax, undef $rdi, $esi, $edx, $rcx, killed $r8d, 2, 0, 2, 0, 2, 7, undef renamable $rax, 1, 8, %stack.0, 0, 1, 8, %stack.1, 0, 1, 8, %stack.2, 0, renamable $ebx, undef renamable $eax, 2, 6, 2, 2, killed renamable $r14(tied-def 0), undef renamable $rbx(tied-def 1), 2, 0, 2, 2, 0, 0, 1, 1, csr_64, implicit-def $rsp, implicit-def $ssp, implicit killed $rbx :: (volatile load store (s64) on %stack.0), (volatile load store (s64) on %stack.1), (volatile load store (s64) on %stack.2)
ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
RET 0
...
|
