File: mve-vmov-lane.txt

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llvm-toolchain-17 1%3A17.0.6-22
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# RUN: llvm-mc -triple=thumbv8m.main   -mattr=+fp-armv8 -disassemble < %s | FileCheck %s --check-prefix=D_REG
# RUN: llvm-mc -triple=thumbv8a        -mattr=+fp-armv8 -disassemble < %s | FileCheck %s --check-prefix=D_REG
# RUN: llvm-mc -triple=thumbv8.1m.main -mattr=+fp-armv8 -disassemble < %s | FileCheck %s --check-prefix=Q_REG
# RUN: llvm-mc -triple=thumbv8.1m.main -mattr=+mve      -disassemble < %s | FileCheck %s --check-prefix=Q_REG

# The disassembly for this instruction varies between v8.1M and other
# architectures. In v8.1M (with either scalar flotaing point, MVE or both), we
# use the Q register syntax, and for all other architectures we use the D
# register syntax.

[0x11,0xee,0x10,0x0b]
# D_REG: vmov.32 r0, d1[0]
# Q_REG: vmov.32 r0, q0[2]