1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
|
; RUN: opt < %s -codegenprepare -S -mtriple=x86_64-unknown-unknown | FileCheck %s
@a = global [10 x i8] zeroinitializer, align 1
declare void @foo()
; ext(and(ld, cst)) -> and(ext(ld), ext(cst))
define void @test1(ptr %p, i32 %ll) {
; CHECK-LABEL: @test1
; CHECK-NEXT: entry:
; CHECK-NEXT: load
; CHECK-NEXT: zext
; CHECK-NEXT: and
entry:
%tmp = load i8, ptr @a, align 1
%and = and i8 %tmp, 60
%cmp = icmp ugt i8 %and, 20
br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry
%conv2 = zext i8 %and to i32
%add = add nsw i32 %conv2, %ll
store i32 %add, ptr %p, align 4
br label %if.end
if.end: ; preds = %if.then, %entry
tail call void @foo()
ret void
}
; ext(or(ld, cst)) -> or(ext(ld), ext(cst))
define void @test2(ptr %p, i32 %ll) {
; CHECK-LABEL: @test2
; CHECK-NEXT: entry:
; CHECK-NEXT: load
; CHECK-NEXT: zext
; CHECK-NEXT: or
entry:
%tmp = load i8, ptr @a, align 1
%or = or i8 %tmp, 60
%cmp = icmp ugt i8 %or, 20
br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry
%conv2 = zext i8 %or to i32
%add = add nsw i32 %conv2, %ll
store i32 %add, ptr %p, align 4
br label %if.end
if.end: ; preds = %if.then, %entry
tail call void @foo()
ret void
}
; ext(and(shl(ld, cst), cst)) -> and(shl(ext(ld), ext(cst)), ext(cst))
define void @test3(ptr %p, i32 %ll) {
; CHECK-LABEL: @test3
; CHECK-NEXT: entry:
; CHECK-NEXT: load
; CHECK-NEXT: zext
; CHECK-NEXT: shl
; CHECK-NEXT: and
entry:
%tmp = load i8, ptr @a, align 1
%shl = shl i8 %tmp, 2
%and = and i8 %shl, 60
%cmp = icmp ugt i8 %and, 20
br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry
%conv2 = zext i8 %and to i32
%add = add nsw i32 %conv2, %ll
store i32 %add, ptr %p, align 4
br label %if.end
if.end: ; preds = %if.then, %entry
tail call void @foo()
ret void
}
; zext(shrl(ld, cst)) -> shrl(zext(ld), zext(cst))
define void @test4(ptr %p, i32 %ll) {
; CHECK-LABEL: @test4
; CHECK-NEXT: entry:
; CHECK-NEXT: load
; CHECK-NEXT: zext
; CHECK-NEXT: lshr
entry:
%tmp = load i8, ptr @a, align 1
%lshr = lshr i8 %tmp, 2
%cmp = icmp ugt i8 %lshr, 20
br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry
%conv2 = zext i8 %lshr to i32
%add = add nsw i32 %conv2, %ll
store i32 %add, ptr %p, align 4
br label %if.end
if.end: ; preds = %if.then, %entry
tail call void @foo()
ret void
}
; ext(xor(ld, cst)) -> xor(ext(ld), ext(cst))
define void @test5(ptr %p, i32 %ll) {
; CHECK-LABEL: @test5
; CHECK-NEXT: entry:
; CHECK-NEXT: load
; CHECK-NEXT: zext
; CHECK-NEXT: xor
entry:
%tmp = load i8, ptr @a, align 1
%xor = xor i8 %tmp, 60
%cmp = icmp ugt i8 %xor, 20
br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry
%conv2 = zext i8 %xor to i32
%add = add nsw i32 %conv2, %ll
store i32 %add, ptr %p, align 4
br label %if.end
if.end: ; preds = %if.then, %entry
tail call void @foo()
ret void
}
|
