1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
|
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -S -passes=early-cse -earlycse-debug-hash | FileCheck %s
; RUN: opt < %s -S -passes='early-cse<memssa>' | FileCheck %s
define i32 @test12(i1 %B, ptr %P1, ptr %P2) {
; CHECK-LABEL: @test12(
; CHECK-NEXT: [[LOAD0:%.*]] = load i32, ptr [[P1:%.*]], align 4
; CHECK-NEXT: [[TMP1:%.*]] = load atomic i32, ptr [[P2:%.*]] seq_cst, align 4
; CHECK-NEXT: [[LOAD1:%.*]] = load i32, ptr [[P1]], align 4
; CHECK-NEXT: [[SEL:%.*]] = select i1 [[B:%.*]], i32 [[LOAD0]], i32 [[LOAD1]]
; CHECK-NEXT: ret i32 [[SEL]]
;
%load0 = load i32, ptr %P1
%1 = load atomic i32, ptr %P2 seq_cst, align 4
%load1 = load i32, ptr %P1
%sel = select i1 %B, i32 %load0, i32 %load1
ret i32 %sel
}
; atomic to non-atomic forwarding is legal
define i32 @test13(i1 %B, ptr %P1) {
; CHECK-LABEL: @test13(
; CHECK-NEXT: [[A:%.*]] = load atomic i32, ptr [[P1:%.*]] seq_cst, align 4
; CHECK-NEXT: ret i32 0
;
%a = load atomic i32, ptr %P1 seq_cst, align 4
%b = load i32, ptr %P1
%res = sub i32 %a, %b
ret i32 %res
}
; atomic to unordered atomic forwarding is legal
define i32 @test14(i1 %B, ptr %P1) {
; CHECK-LABEL: @test14(
; CHECK-NEXT: [[A:%.*]] = load atomic i32, ptr [[P1:%.*]] seq_cst, align 4
; CHECK-NEXT: ret i32 0
;
%a = load atomic i32, ptr %P1 seq_cst, align 4
%b = load atomic i32, ptr %P1 unordered, align 4
%res = sub i32 %a, %b
ret i32 %res
}
; implementation restriction: can't forward to stonger
; than unordered
define i32 @test15(i1 %B, ptr %P1, ptr %P2) {
; CHECK-LABEL: @test15(
; CHECK-NEXT: [[A:%.*]] = load atomic i32, ptr [[P1:%.*]] seq_cst, align 4
; CHECK-NEXT: [[B:%.*]] = load atomic i32, ptr [[P1]] seq_cst, align 4
; CHECK-NEXT: [[RES:%.*]] = sub i32 [[A]], [[B]]
; CHECK-NEXT: ret i32 [[RES]]
;
%a = load atomic i32, ptr %P1 seq_cst, align 4
%b = load atomic i32, ptr %P1 seq_cst, align 4
%res = sub i32 %a, %b
ret i32 %res
}
; forwarding non-atomic to atomic is wrong! (However,
; it would be legal to use the later value in place of the
; former in this particular example. We just don't
; do that right now.)
define i32 @test16(i1 %B, ptr %P1, ptr %P2) {
; CHECK-LABEL: @test16(
; CHECK-NEXT: [[A:%.*]] = load i32, ptr [[P1:%.*]], align 4
; CHECK-NEXT: [[B:%.*]] = load atomic i32, ptr [[P1]] unordered, align 4
; CHECK-NEXT: [[RES:%.*]] = sub i32 [[A]], [[B]]
; CHECK-NEXT: ret i32 [[RES]]
;
%a = load i32, ptr %P1, align 4
%b = load atomic i32, ptr %P1 unordered, align 4
%res = sub i32 %a, %b
ret i32 %res
}
; Can't DSE across a full fence
define void @fence_seq_cst_store(i1 %B, ptr %P1, ptr %P2) {
; CHECK-LABEL: @fence_seq_cst_store(
; CHECK-NEXT: store i32 0, ptr [[P1:%.*]], align 4
; CHECK-NEXT: store atomic i32 0, ptr [[P2:%.*]] seq_cst, align 4
; CHECK-NEXT: store i32 0, ptr [[P1]], align 4
; CHECK-NEXT: ret void
;
store i32 0, ptr %P1, align 4
store atomic i32 0, ptr %P2 seq_cst, align 4
store i32 0, ptr %P1, align 4
ret void
}
; Can't DSE across a full fence
define void @fence_seq_cst(i1 %B, ptr %P1, ptr %P2) {
; CHECK-LABEL: @fence_seq_cst(
; CHECK-NEXT: store i32 0, ptr [[P1:%.*]], align 4
; CHECK-NEXT: fence seq_cst
; CHECK-NEXT: store i32 0, ptr [[P1]], align 4
; CHECK-NEXT: ret void
;
store i32 0, ptr %P1, align 4
fence seq_cst
store i32 0, ptr %P1, align 4
ret void
}
; Can't DSE across a full fence
define void @fence_asm_sideeffect(i1 %B, ptr %P1, ptr %P2) {
; CHECK-LABEL: @fence_asm_sideeffect(
; CHECK-NEXT: store i32 0, ptr [[P1:%.*]], align 4
; CHECK-NEXT: call void asm sideeffect "", ""()
; CHECK-NEXT: store i32 0, ptr [[P1]], align 4
; CHECK-NEXT: ret void
;
store i32 0, ptr %P1, align 4
call void asm sideeffect "", ""()
store i32 0, ptr %P1, align 4
ret void
}
; Can't DSE across a full fence
define void @fence_asm_memory(i1 %B, ptr %P1, ptr %P2) {
; CHECK-LABEL: @fence_asm_memory(
; CHECK-NEXT: store i32 0, ptr [[P1:%.*]], align 4
; CHECK-NEXT: call void asm "", "~{memory}"()
; CHECK-NEXT: store i32 0, ptr [[P1]], align 4
; CHECK-NEXT: ret void
;
store i32 0, ptr %P1, align 4
call void asm "", "~{memory}"()
store i32 0, ptr %P1, align 4
ret void
}
; Can't remove a volatile load
define i32 @volatile_load(i1 %B, ptr %P1, ptr %P2) {
; CHECK-LABEL: @volatile_load(
; CHECK-NEXT: [[A:%.*]] = load i32, ptr [[P1:%.*]], align 4
; CHECK-NEXT: [[B:%.*]] = load volatile i32, ptr [[P1]], align 4
; CHECK-NEXT: [[RES:%.*]] = sub i32 [[A]], [[B]]
; CHECK-NEXT: ret i32 [[RES]]
;
%a = load i32, ptr %P1, align 4
%b = load volatile i32, ptr %P1, align 4
%res = sub i32 %a, %b
ret i32 %res
}
; Can't remove redundant volatile loads
define i32 @redundant_volatile_load(i1 %B, ptr %P1, ptr %P2) {
; CHECK-LABEL: @redundant_volatile_load(
; CHECK-NEXT: [[A:%.*]] = load volatile i32, ptr [[P1:%.*]], align 4
; CHECK-NEXT: [[B:%.*]] = load volatile i32, ptr [[P1]], align 4
; CHECK-NEXT: [[RES:%.*]] = sub i32 [[A]], [[B]]
; CHECK-NEXT: ret i32 [[RES]]
;
%a = load volatile i32, ptr %P1, align 4
%b = load volatile i32, ptr %P1, align 4
%res = sub i32 %a, %b
ret i32 %res
}
; Can't DSE a volatile store
define void @volatile_store(i1 %B, ptr %P1, ptr %P2) {
; CHECK-LABEL: @volatile_store(
; CHECK-NEXT: store volatile i32 0, ptr [[P1:%.*]], align 4
; CHECK-NEXT: store i32 3, ptr [[P1]], align 4
; CHECK-NEXT: ret void
;
store volatile i32 0, ptr %P1, align 4
store i32 3, ptr %P1, align 4
ret void
}
; Can't DSE a redundant volatile store
define void @redundant_volatile_store(i1 %B, ptr %P1, ptr %P2) {
; CHECK-LABEL: @redundant_volatile_store(
; CHECK-NEXT: store volatile i32 0, ptr [[P1:%.*]], align 4
; CHECK-NEXT: store volatile i32 0, ptr [[P1]], align 4
; CHECK-NEXT: ret void
;
store volatile i32 0, ptr %P1, align 4
store volatile i32 0, ptr %P1, align 4
ret void
}
; Can value forward from volatiles
define i32 @test20(i1 %B, ptr %P1, ptr %P2) {
; CHECK-LABEL: @test20(
; CHECK-NEXT: [[A:%.*]] = load volatile i32, ptr [[P1:%.*]], align 4
; CHECK-NEXT: ret i32 0
;
%a = load volatile i32, ptr %P1, align 4
%b = load i32, ptr %P1, align 4
%res = sub i32 %a, %b
ret i32 %res
}
; Can DSE a non-volatile store in favor of a volatile one
; currently a missed optimization
define void @test21(i1 %B, ptr %P1, ptr %P2) {
; CHECK-LABEL: @test21(
; CHECK-NEXT: store i32 0, ptr [[P1:%.*]], align 4
; CHECK-NEXT: store volatile i32 3, ptr [[P1]], align 4
; CHECK-NEXT: ret void
;
store i32 0, ptr %P1, align 4
store volatile i32 3, ptr %P1, align 4
ret void
}
; Can DSE a normal store in favor of a unordered one
define void @test22(i1 %B, ptr %P1, ptr %P2) {
; CHECK-LABEL: @test22(
; CHECK-NEXT: store atomic i32 3, ptr [[P1:%.*]] unordered, align 4
; CHECK-NEXT: ret void
;
store i32 0, ptr %P1, align 4
store atomic i32 3, ptr %P1 unordered, align 4
ret void
}
; Can also DSE a unordered store in favor of a normal one
define void @test23(i1 %B, ptr %P1, ptr %P2) {
; CHECK-LABEL: @test23(
; CHECK-NEXT: store i32 0, ptr [[P1:%.*]], align 4
; CHECK-NEXT: ret void
;
store atomic i32 3, ptr %P1 unordered, align 4
store i32 0, ptr %P1, align 4
ret void
}
; As an implementation limitation, can't remove ordered stores
; Note that we could remove the earlier store if we could
; represent the required ordering.
define void @test24(i1 %B, ptr %P1, ptr %P2) {
; CHECK-LABEL: @test24(
; CHECK-NEXT: store atomic i32 3, ptr [[P1:%.*]] release, align 4
; CHECK-NEXT: store i32 0, ptr [[P1]], align 4
; CHECK-NEXT: ret void
;
store atomic i32 3, ptr %P1 release, align 4
store i32 0, ptr %P1, align 4
ret void
}
; Can't remove volatile stores - each is independently observable and
; the count of such stores is an observable program side effect.
define void @test25(i1 %B, ptr %P1, ptr %P2) {
; CHECK-LABEL: @test25(
; CHECK-NEXT: store volatile i32 3, ptr [[P1:%.*]], align 4
; CHECK-NEXT: store volatile i32 0, ptr [[P1]], align 4
; CHECK-NEXT: ret void
;
store volatile i32 3, ptr %P1, align 4
store volatile i32 0, ptr %P1, align 4
ret void
}
; Can DSE a unordered store in favor of a unordered one
define void @test26(i1 %B, ptr %P1, ptr %P2) {
; CHECK-LABEL: @test26(
; CHECK-NEXT: store atomic i32 3, ptr [[P1:%.*]] unordered, align 4
; CHECK-NEXT: ret void
;
store atomic i32 0, ptr %P1 unordered, align 4
store atomic i32 3, ptr %P1 unordered, align 4
ret void
}
; Can DSE a unordered store in favor of a ordered one,
; but current don't due to implementation limits
define void @test27(i1 %B, ptr %P1, ptr %P2) {
; CHECK-LABEL: @test27(
; CHECK-NEXT: store atomic i32 0, ptr [[P1:%.*]] unordered, align 4
; CHECK-NEXT: store atomic i32 3, ptr [[P1]] release, align 4
; CHECK-NEXT: ret void
;
store atomic i32 0, ptr %P1 unordered, align 4
store atomic i32 3, ptr %P1 release, align 4
ret void
}
; Can DSE an unordered atomic store in favor of an
; ordered one, but current don't due to implementation limits
define void @test28(i1 %B, ptr %P1, ptr %P2) {
; CHECK-LABEL: @test28(
; CHECK-NEXT: store atomic i32 0, ptr [[P1:%.*]] unordered, align 4
; CHECK-NEXT: store atomic i32 3, ptr [[P1]] release, align 4
; CHECK-NEXT: ret void
;
store atomic i32 0, ptr %P1 unordered, align 4
store atomic i32 3, ptr %P1 release, align 4
ret void
}
; As an implementation limitation, can't remove ordered stores
; see also: @test24
define void @test29(i1 %B, ptr %P1, ptr %P2) {
; CHECK-LABEL: @test29(
; CHECK-NEXT: store atomic i32 3, ptr [[P1:%.*]] release, align 4
; CHECK-NEXT: store atomic i32 0, ptr [[P1]] unordered, align 4
; CHECK-NEXT: ret void
;
store atomic i32 3, ptr %P1 release, align 4
store atomic i32 0, ptr %P1 unordered, align 4
ret void
}
|
