1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
|
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -aa-pipeline=basic-aa -passes='require<memoryssa>,gvn' -S -verify-memoryssa %s | FileCheck %s
; REQUIRES: asserts
declare void @use(i32) readnone
define i32 @test(ptr %ptr.0, ptr %ptr.1, i1 %c) {
; CHECK-LABEL: @test(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[LV_0:%.*]] = load i32, ptr [[PTR_0:%.*]], align 8
; CHECK-NEXT: call void @use(i32 [[LV_0]])
; CHECK-NEXT: br i1 [[C:%.*]], label [[IF_THEN749:%.*]], label [[FOR_INC774:%.*]]
; CHECK: if.then749:
; CHECK-NEXT: [[LV_1:%.*]] = load ptr, ptr [[PTR_1:%.*]], align 8
; CHECK-NEXT: store i32 10, ptr [[LV_1]], align 4
; CHECK-NEXT: [[LV_2_PRE:%.*]] = load i32, ptr [[PTR_0]], align 8
; CHECK-NEXT: br label [[FOR_INC774]]
; CHECK: for.inc774:
; CHECK-NEXT: [[LV_2:%.*]] = phi i32 [ [[LV_2_PRE]], [[IF_THEN749]] ], [ [[LV_0]], [[ENTRY:%.*]] ]
; CHECK-NEXT: call void @use(i32 [[LV_2]])
; CHECK-NEXT: ret i32 1
;
entry:
br label %for.end435
for.end435:
%lv.0 = load i32, ptr %ptr.0, align 8
call void @use(i32 %lv.0)
br label %if.end724
if.end724:
br i1 %c, label %if.then749, label %for.inc774
if.then749:
%lv.1 = load ptr, ptr %ptr.1, align 8
store i32 10, ptr %lv.1, align 4
br label %for.inc774
for.inc774:
br label %for.body830
for.body830:
%lv.2 = load i32, ptr %ptr.0, align 8
call void @use(i32 %lv.2)
br label %for.body.i22
for.body.i22:
ret i32 1
}
define i32 @test_volatile(ptr %ptr.0, ptr %ptr.1, i1 %c) {
; CHECK-LABEL: @test_volatile(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[LV_0:%.*]] = load volatile i32, ptr [[PTR_0:%.*]], align 8
; CHECK-NEXT: call void @use(i32 [[LV_0]])
; CHECK-NEXT: br i1 [[C:%.*]], label [[IF_THEN749:%.*]], label [[FOR_INC774:%.*]]
; CHECK: if.then749:
; CHECK-NEXT: [[LV_1:%.*]] = load volatile ptr, ptr [[PTR_1:%.*]], align 8
; CHECK-NEXT: store i32 10, ptr [[LV_1]], align 4
; CHECK-NEXT: br label [[FOR_INC774]]
; CHECK: for.inc774:
; CHECK-NEXT: [[LV_2:%.*]] = load volatile i32, ptr [[PTR_0]], align 8
; CHECK-NEXT: call void @use(i32 [[LV_2]])
; CHECK-NEXT: ret i32 1
;
entry:
br label %for.end435
for.end435:
%lv.0 = load volatile i32, ptr %ptr.0, align 8
call void @use(i32 %lv.0)
br label %if.end724
if.end724:
br i1 %c, label %if.then749, label %for.inc774
if.then749:
%lv.1 = load volatile ptr, ptr %ptr.1, align 8
store i32 10, ptr %lv.1, align 4
br label %for.inc774
for.inc774:
br label %for.body830
for.body830:
%lv.2 = load volatile i32, ptr %ptr.0, align 8
call void @use(i32 %lv.2)
br label %for.body.i22
for.body.i22:
ret i32 1
}
define void @test_assume_false_to_store_undef_1(ptr %ptr) {
; CHECK-LABEL: @test_assume_false_to_store_undef_1(
; CHECK-NEXT: store i32 10, ptr [[PTR:%.*]], align 4
; CHECK-NEXT: store i8 poison, ptr null, align 1
; CHECK-NEXT: call void @f()
; CHECK-NEXT: ret void
;
store i32 10, ptr %ptr
%tobool = icmp ne i16 1, 0
%xor = xor i1 %tobool, true
call void @llvm.assume(i1 %xor)
call void @f()
ret void
}
define i32 @test_assume_false_to_store_undef_2(ptr %ptr, ptr %ptr.2) {
; CHECK-LABEL: @test_assume_false_to_store_undef_2(
; CHECK-NEXT: store i32 10, ptr [[PTR:%.*]], align 4
; CHECK-NEXT: [[LV:%.*]] = load i32, ptr [[PTR_2:%.*]], align 4
; CHECK-NEXT: store i8 poison, ptr null, align 1
; CHECK-NEXT: call void @f()
; CHECK-NEXT: ret i32 [[LV]]
;
store i32 10, ptr %ptr
%lv = load i32, ptr %ptr.2
%tobool = icmp ne i16 1, 0
%xor = xor i1 %tobool, true
call void @llvm.assume(i1 %xor)
call void @f()
ret i32 %lv
}
define i32 @test_assume_false_to_store_undef_3(ptr %ptr, ptr %ptr.2) {
; CHECK-LABEL: @test_assume_false_to_store_undef_3(
; CHECK-NEXT: store i32 10, ptr [[PTR:%.*]], align 4
; CHECK-NEXT: [[LV:%.*]] = load i32, ptr [[PTR_2:%.*]], align 4
; CHECK-NEXT: store i8 poison, ptr null, align 1
; CHECK-NEXT: ret i32 [[LV]]
;
store i32 10, ptr %ptr
%lv = load i32, ptr %ptr.2
%tobool = icmp ne i16 1, 0
%xor = xor i1 %tobool, true
call void @llvm.assume(i1 %xor)
ret i32 %lv
}
; Test case for PR48616.
define void @rename_unreachable_block(i1 %c) personality ptr undef {
; CHECK-LABEL: @rename_unreachable_block(
; CHECK-NEXT: ret void
; CHECK: bb1:
; CHECK-NEXT: [[LP:%.*]] = landingpad { ptr, i32 }
; CHECK-NEXT: cleanup
; CHECK-NEXT: ret void
; CHECK: bb2:
; CHECK-NEXT: invoke void @f()
; CHECK-NEXT: to label [[BB4:%.*]] unwind label [[BB1:%.*]]
; CHECK: bb4:
; CHECK-NEXT: unreachable
;
ret void
bb1:
%lp = landingpad { ptr, i32 }
cleanup
ret void
bb2:
br i1 %c, label %bb3, label %bb3
bb3:
invoke void @f()
to label %bb4 unwind label %bb1
bb4:
unreachable
}
declare void @f()
declare void @llvm.assume(i1 noundef) #0
attributes #0 = { nofree nosync nounwind willreturn }
|
