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|
## Tests llvm-dwarfdump handling of AMDGPU relocations. We provide a .debug_info
## section with multiple DW_AT_high_pc entries (that's one of the attributes for
## which relocations are resolved by llvm-dwarfdump) and we add a relocation for
## each of them. The first YAML document represents an amdgcn code object, and
## the second an r600 code object.
# RUN: yaml2obj --docnum=1 -DMACH= %s \
# RUN: | llvm-dwarfdump - 2>&1 | FileCheck --check-prefixes=AMDGCN,UNKNOWN %s
# RUN: yaml2obj --docnum=1 -DMACH=EF_AMDGPU_MACH_AMDGCN_GFX803 %s \
# RUN: | llvm-dwarfdump - 2>&1 | FileCheck --check-prefixes=AMDGCN,KNOWN %s
# RUN: yaml2obj --docnum=2 -DMACH= %s \
# RUN: | llvm-dwarfdump - 2>&1 | FileCheck --check-prefixes=R600,UNKNOWN %s
# RUN: yaml2obj --docnum=2 -DMACH=EF_AMDGPU_MACH_R600_R600 %s \
# RUN: | llvm-dwarfdump - 2>&1 | FileCheck --check-prefixes=R600,KNOWN %s
# UNKNOWN: -: Error in creating MCRegInfo
# KNOWN-NOT: -: Error in creating MCRegInfo
# AMDGCN: -: file format elf64-amdgpu
--- !ELF
FileHeader:
Class: ELFCLASS64
Data: ELFDATA2LSB
OSABI: ELFOSABI_AMDGPU_HSA
ABIVersion: 0x02
Type: ET_REL
Machine: EM_AMDGPU
Flags: [[[MACH]]]
DWARF:
debug_abbrev:
- Table:
- Code: 1
Tag: DW_TAG_compile_unit
Children: DW_CHILDREN_no
Attributes:
- Attribute: DW_AT_high_pc
Form: DW_FORM_addr
- Attribute: DW_AT_high_pc
Form: DW_FORM_addr
- Attribute: DW_AT_high_pc
Form: DW_FORM_addr
- Attribute: DW_AT_high_pc
Form: DW_FORM_addr
- Attribute: DW_AT_high_pc
Form: DW_FORM_addr
- Attribute: DW_AT_high_pc
Form: DW_FORM_addr
- Attribute: DW_AT_high_pc
Form: DW_FORM_addr
- Attribute: DW_AT_high_pc
Form: DW_FORM_addr
debug_info:
- Version: 4
AddrSize: 8
Entries:
- AbbrCode: 1
Values:
- Value: 0x4242424242424242
- Value: 0x4242424242424242
- Value: 0x4242424242424242
- Value: 0x4242424242424242
- Value: 0x4242424242424242
- Value: 0x4242424242424242
- Value: 0x4242424242424242
- Value: 0x4242424242424242
Sections:
- Name: .rela.debug_info
Type: SHT_RELA
Flags: [ SHF_INFO_LINK ]
AddressAlign: 0x0000000000000008
Info: .debug_info
Relocations:
# AMDGCN: DW_AT_high_pc (0x0000000000000001)
- Offset: 0x000000000000000C # 0xC + 8*0
Type: R_AMDGPU_ABS64
Symbol: v1
Addend: 0x0
# AMDGCN-NEXT: DW_AT_high_pc (0x0000000000000043)
- Offset: 0x0000000000000014 # 0xC + 8*1
Type: R_AMDGPU_ABS64
Symbol: v1
Addend: 0x42
# AMDGCN-NEXT: DW_AT_high_pc (0xffffffffffffffff)
- Offset: 0x000000000000001C # 0xC + 8*2
Type: R_AMDGPU_ABS64
Symbol: v0
Addend: 0xffffffffffffffff
# AMDGCN-NEXT: DW_AT_high_pc (0xffffffffffffffff)
- Offset: 0x0000000000000024 # 0xC + 8*3
Type: R_AMDGPU_ABS64
Symbol: vffffffffffffffff
Addend: 0x0
# AMDGCN: DW_AT_high_pc (0x0000000000000001)
- Offset: 0x000000000000002C # 0xC + 8*4
Type: R_AMDGPU_ABS32
Symbol: v1
Addend: 0x0
# AMDGCN-NEXT: DW_AT_high_pc (0x0000000000000043)
- Offset: 0x0000000000000034 # 0xC + 8*5
Type: R_AMDGPU_ABS32
Symbol: v1
Addend: 0x42
# AMDGCN-NEXT: DW_AT_high_pc (0xffffffffffffffff)
- Offset: 0x000000000000003C # 0xC + 8*6
Type: R_AMDGPU_ABS32
Symbol: v0
Addend: 0xffffffffffffffff
# AMDGCN-NEXT: DW_AT_high_pc (0xffffffffffffffff)
- Offset: 0x0000000000000044 # 0xC + 8*7
Type: R_AMDGPU_ABS32
Symbol: vffffffffffffffff
Addend: 0x0
Symbols:
- Name: v0
Type: STT_SECTION
Section: .debug_info
Value: 0x0
- Name: v1
Type: STT_SECTION
Section: .debug_info
Value: 0x1
- Name: vffffffffffffffff
Type: STT_SECTION
Section: .debug_info
Value: 0xffffffffffffffff
...
# R600: -: file format elf32-amdgpu
--- !ELF
FileHeader:
Class: ELFCLASS32
Data: ELFDATA2LSB
Type: ET_REL
Machine: EM_AMDGPU
Flags: [[[MACH]]]
DWARF:
debug_abbrev:
- Table:
- Code: 0x00000001
Tag: DW_TAG_compile_unit
Children: DW_CHILDREN_no
Attributes:
- Attribute: DW_AT_high_pc
Form: DW_FORM_addr
- Attribute: DW_AT_high_pc
Form: DW_FORM_addr
- Attribute: DW_AT_high_pc
Form: DW_FORM_addr
- Attribute: DW_AT_high_pc
Form: DW_FORM_addr
debug_info:
- Version: 4
AddrSize: 4
Entries:
- AbbrCode: 1
Values:
- Value: 0x42424242
- Value: 0x42424242
- Value: 0x42424242
- Value: 0x42424242
Sections:
- Name: .rela.debug_info
Type: SHT_RELA
Flags: [ SHF_INFO_LINK ]
AddressAlign: 0x0000000000000001
Info: .debug_info
Relocations:
## FIXME: Is R_AMDGPU_ABS64 meaningful here?
# R600: DW_AT_high_pc (0x00000001)
- Offset: 0x0000000C # 0xC + 4*0
Type: R_AMDGPU_ABS32
Symbol: v1
Addend: 0x0
# R600-NEXT: DW_AT_high_pc (0x00000043)
- Offset: 0x00000010 # 0xC + 4*1
Type: R_AMDGPU_ABS32
Symbol: v1
Addend: 0x42
## FIXME: Why is this field printed as sign-extended 64-bit in a 32-bit executable?
# R600-NEXT: DW_AT_high_pc (0xffffffffffffffff)
- Offset: 0x00000014 # 0xC + 4*2
Type: R_AMDGPU_ABS32
Symbol: v0
Addend: 0xffffffff
# R600-NEXT: DW_AT_high_pc (0xffffffff)
- Offset: 0x00000018 # 0xC + 4*3
Type: R_AMDGPU_ABS32
Symbol: vffffffff
Addend: 0x0
Symbols:
- Name: v0
Type: STT_SECTION
Section: .debug_info
Value: 0x0
- Name: v1
Type: STT_SECTION
Section: .debug_info
Value: 0x1
- Name: vffffffff
Type: STT_SECTION
Section: .debug_info
Value: 0xffffffff
...
|
