File: PR50725.s

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llvm-toolchain-17 1%3A17.0.6-22
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# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=skylake -all-views=false -summary-view -iterations=1 < %s | FileCheck %s

# Do not crash when running this simulation.
# It is not safe to issue FXRSTOR if SKLPort1 is not available.

bswap %eax
bswap %eax
fxrstor 64(%rsp)

# CHECK:      Iterations:        1
# CHECK-NEXT: Instructions:      3
# CHECK-NEXT: Total Cycles:      68
# CHECK-NEXT: Total uOps:        92

# CHECK:      Dispatch Width:    6
# CHECK-NEXT: uOps Per Cycle:    1.35
# CHECK-NEXT: IPC:               0.04
# CHECK-NEXT: Block RThroughput: 16.5