File: barrier_output.s

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llvm-toolchain-17 1%3A17.0.6-22
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# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -iterations=1 -resource-pressure=false -summary-view=false -show-barriers < %s | FileCheck %s

clflush (%rax)
lfence
mfence
sfence
maskmovdqu	%xmm0, %xmm1

# CHECK:      Instruction Info:
# CHECK-NEXT: [1]: #uOps
# CHECK-NEXT: [2]: Latency
# CHECK-NEXT: [3]: RThroughput
# CHECK-NEXT: [4]: MayLoad
# CHECK-NEXT: [5]: MayStore
# CHECK-NEXT: [6]: HasSideEffects (U)
# CHECK-NEXT: [7]: LoadBarrier
# CHECK-NEXT: [8]: StoreBarrier

# CHECK:      [1]    [2]    [3]    [4]    [5]    [6]    [7]    [8]    Instructions:
# CHECK-NEXT:  4      5     1.00    *      *      U                   clflush	(%rax)
# CHECK-NEXT:  1      1     1.00    *      *      U      *            lfence
# CHECK-NEXT:  1      1     1.00    *      *      U      *      *     mfence
# CHECK-NEXT:  1      1     1.00    *      *      U             *     sfence
# CHECK-NEXT:  1      1     1.00    *      *      U                   maskmovdqu	%xmm0, %xmm1