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llvm-toolchain-18 1%3A18.1.8-18
- links: PTS, VCS
- area: main
- in suites: forky, sid, trixie
- size: 1,908,340 kB
- sloc: cpp: 6,667,937; ansic: 1,440,452; asm: 883,619; python: 230,549; objc: 76,880; f90: 74,238; lisp: 35,989; pascal: 16,571; sh: 10,229; perl: 7,459; ml: 5,047; awk: 3,523; makefile: 2,987; javascript: 2,149; xml: 892; fortran: 649; cs: 573
Folder: kernel-name-restriction
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.. (parent) | |||
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d | rwxr-xr-x | 28 | otherdir |
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d | rwxr-xr-x | 83 | some |
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d | rwxr-xr-x | 31 | somedir |
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d | rwxr-xr-x | 69 | uppercase |
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- | rw-r--r-- | 26 | Verilog.cl |
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- | rw-r--r-- | 25 | kernel.cl |
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- | rw-r--r-- | 26 | kernel.h |
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- | rw-r--r-- | 31 | other_Verilog.cl |
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- | rw-r--r-- | 29 | otherthing.cl |
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- | rw-r--r-- | 29 | some_kernel.cl |
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- | rw-r--r-- | 24 | thing.h |
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- | rw-r--r-- | 27 | verilog.h |
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- | rw-r--r-- | 24 | vhdl.CL |
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- | rw-r--r-- | 24 | vhdl.h |
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- | rw-r--r-- | 32 | vhdl_number_two.cl |