File: inline-asm-vecpred128.ll

package info (click to toggle)
llvm-toolchain-18 1%3A18.1.8-18
  • links: PTS, VCS
  • area: main
  • in suites: forky, sid, trixie
  • size: 1,908,340 kB
  • sloc: cpp: 6,667,937; ansic: 1,440,452; asm: 883,619; python: 230,549; objc: 76,880; f90: 74,238; lisp: 35,989; pascal: 16,571; sh: 10,229; perl: 7,459; ml: 5,047; awk: 3,523; makefile: 2,987; javascript: 2,149; xml: 892; fortran: 649; cs: 573
file content (15 lines) | stat: -rw-r--r-- 473 bytes parent folder | download | duplicates (8)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
; RUN: llc -march=hexagon < %s | FileCheck %s
; REQUIRES: asserts

; Make sure we can handle the 'q' constraint in the 128-byte mode.

target triple = "hexagon"

; CHECK-LABEL: fred
; CHECK: if (q{{[0-3]}}) vmem
define void @fred() #0 {
  tail call void asm sideeffect "if ($0) vmem($1) = $2;", "q,r,v,~{memory}"(<128 x i1> undef, ptr undef, <32 x i32> undef) #0
  ret void
}

attributes #0 = { nounwind "target-cpu"="hexagonv60" "target-features"="+hvx,+hvx-length128b" }