File: noconvergent.mir

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llvm-toolchain-18 1%3A18.1.8-18
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn -run-pass none -o - %s | FileCheck %s

---
# Completely invalid code, but it checks that noconvergent round-trips properly.
name:            use_noconvergent
registers:
body: |
  bb.0:
    ; CHECK-LABEL: name: use_noconvergent
    ; CHECK: [[DEF:%[0-9]+]]:sreg_64 = IMPLICIT_DEF
    ; CHECK-NEXT: [[SI_CALL:%[0-9]+]]:sreg_64 = SI_CALL [[DEF]], 1, csr_amdgpu
    ; CHECK-NEXT: [[SI_CALL]]:sreg_64 = noconvergent SI_CALL [[DEF]], 2, csr_amdgpu
    %0:sreg_64 = IMPLICIT_DEF
    %1:sreg_64 = SI_CALL %0, 1, csr_amdgpu
    %1:sreg_64 = noconvergent SI_CALL %0, 2, csr_amdgpu
...