File: subreg-to-reg-0.ll

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llvm-toolchain-18 1%3A18.1.8-18
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s

; Do eliminate the zero-extension instruction and rely on
; x86-64's implicit zero-extension!

define i64 @foo(ptr %p) nounwind {
; CHECK-LABEL: foo:
; CHECK:       # %bb.0:
; CHECK-NEXT:    movl (%rdi), %eax
; CHECK-NEXT:    incl %eax
; CHECK-NEXT:    retq
  %t = load i32, ptr %p
  %n = add i32 %t, 1
  %z = zext i32 %n to i64
  ret i64 %z
}