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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn -mcpu=fiji -run-pass=si-fix-sgpr-copies -verify-machineinstrs -o - %s | FileCheck --check-prefix=GFX8 %s
# RUN: llc -mtriple=amdgcn -mcpu=gfx1200 -run-pass=si-fix-sgpr-copies -verify-machineinstrs -o - %s | FileCheck --check-prefix=GFX12 %s
---
name: lshlrev_b64
body: |
bb.0:
; GFX8-LABEL: name: lshlrev_b64
; GFX8: [[DEF:%[0-9]+]]:vreg_64 = IMPLICIT_DEF
; GFX8-NEXT: [[DEF1:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
; GFX8-NEXT: [[DEF2:%[0-9]+]]:vreg_64 = IMPLICIT_DEF
; GFX8-NEXT: [[V_LSHL_ADD_U64_e64_:%[0-9]+]]:vreg_64 = V_LSHL_ADD_U64_e64 [[DEF]], [[DEF1]], [[DEF2]], implicit $exec
; GFX8-NEXT: [[DEF3:%[0-9]+]]:sreg_64 = IMPLICIT_DEF
; GFX8-NEXT: [[DEF4:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
; GFX8-NEXT: [[V_LSHLREV_B64_e64_:%[0-9]+]]:vreg_64 = V_LSHLREV_B64_e64 [[DEF4]], [[V_LSHL_ADD_U64_e64_]], implicit $exec
; GFX12-LABEL: name: lshlrev_b64
; GFX12: [[DEF:%[0-9]+]]:vreg_64 = IMPLICIT_DEF
; GFX12-NEXT: [[DEF1:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
; GFX12-NEXT: [[DEF2:%[0-9]+]]:vreg_64 = IMPLICIT_DEF
; GFX12-NEXT: [[V_LSHL_ADD_U64_e64_:%[0-9]+]]:vreg_64 = V_LSHL_ADD_U64_e64 [[DEF]], [[DEF1]], [[DEF2]], implicit $exec
; GFX12-NEXT: [[DEF3:%[0-9]+]]:sreg_64 = IMPLICIT_DEF
; GFX12-NEXT: [[DEF4:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
; GFX12-NEXT: [[V_LSHLREV_B64_pseudo_e64_:%[0-9]+]]:vreg_64 = V_LSHLREV_B64_pseudo_e64 [[DEF4]], [[V_LSHL_ADD_U64_e64_]], implicit $exec
%0:vreg_64 = IMPLICIT_DEF
%1:vgpr_32 = IMPLICIT_DEF
%2:vreg_64 = IMPLICIT_DEF
%3:vreg_64 = V_LSHL_ADD_U64_e64 %0:vreg_64, %1:vgpr_32, %2:vreg_64, implicit $exec
%4:sreg_64 = COPY %3:vreg_64
%5:sreg_32 = IMPLICIT_DEF
%6:sreg_64 = S_LSHL_B64 killed %4:sreg_64, %5:sreg_32, implicit-def dead $scc
...
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