File: asm-show-inst.ll.expected

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llvm-toolchain-19 1%3A19.1.7-19
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
;; Check that we remove the exact MCInst number from --asm-verbose output
; RUN: llc < %s -mtriple=i686-unknown-unknown --asm-show-inst | FileCheck %s --check-prefix=VERBOSE
; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=CHECK

define i8 @add_i8(i8 %a) nounwind {
; VERBOSE-LABEL: add_i8:
; VERBOSE:       # %bb.0:
; VERBOSE-NEXT:    movzbl {{[0-9]+}}(%esp), %eax # <MCInst #[[#MCINST1:]] MOVZX32rm8
; VERBOSE-NEXT:    # <MCOperand Reg:[[#MCREG1:]]>
; VERBOSE-NEXT:    # <MCOperand Reg:[[#MCREG2:]]>
; VERBOSE-NEXT:    # <MCOperand Imm:1>
; VERBOSE-NEXT:    # <MCOperand Reg:[[#MCREG3:]]>
; VERBOSE-NEXT:    # <MCOperand Imm:4>
; VERBOSE-NEXT:    # <MCOperand Reg:[[#MCREG3]]>>
; VERBOSE-NEXT:    addb $2, %al # <MCInst #[[#MCINST2:]] ADD8i8
; VERBOSE-NEXT:    # <MCOperand Imm:2>>
; VERBOSE-NEXT:    retl # <MCInst #[[#MCINST3:]] RET32
; VERBOSE-NEXT:    # <MCOperand Reg:[[#MCREG4:]]>>
;
; CHECK-LABEL: add_i8:
; CHECK:       # %bb.0:
; CHECK-NEXT:    movzbl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT:    addb $2, %al
; CHECK-NEXT:    retl
  %add = add i8 %a, 2
  ret i8 %add
}

define i32 @add_i32(i32 %a) nounwind {
; VERBOSE-LABEL: add_i32:
; VERBOSE:       # %bb.0:
; VERBOSE-NEXT:    movl {{[0-9]+}}(%esp), %eax # <MCInst #[[#MCINST4:]] MOV32rm
; VERBOSE-NEXT:    # <MCOperand Reg:[[#MCREG1]]>
; VERBOSE-NEXT:    # <MCOperand Reg:[[#MCREG2]]>
; VERBOSE-NEXT:    # <MCOperand Imm:1>
; VERBOSE-NEXT:    # <MCOperand Reg:[[#MCREG3]]>
; VERBOSE-NEXT:    # <MCOperand Imm:4>
; VERBOSE-NEXT:    # <MCOperand Reg:[[#MCREG3]]>>
; VERBOSE-NEXT:    addl $2, %eax # <MCInst #[[#MCINST5:]] ADD32ri8
; VERBOSE-NEXT:    # <MCOperand Reg:[[#MCREG1]]>
; VERBOSE-NEXT:    # <MCOperand Reg:[[#MCREG1]]>
; VERBOSE-NEXT:    # <MCOperand Imm:2>>
; VERBOSE-NEXT:    retl # <MCInst #[[#MCINST3]] RET32
; VERBOSE-NEXT:    # <MCOperand Reg:[[#MCREG1]]>>
;
; CHECK-LABEL: add_i32:
; CHECK:       # %bb.0:
; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT:    addl $2, %eax
; CHECK-NEXT:    retl
  %add = add i32 %a, 2
  ret i32 %add
}