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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc --mtriple=loongarch64 -mattr=+d --verify-machineinstrs < %s | FileCheck %s
define i8 @scmp.8.8(i8 signext %x, i8 signext %y) nounwind {
; CHECK-LABEL: scmp.8.8:
; CHECK: # %bb.0:
; CHECK-NEXT: slt $a2, $a0, $a1
; CHECK-NEXT: slt $a0, $a1, $a0
; CHECK-NEXT: sub.d $a0, $a0, $a2
; CHECK-NEXT: ret
%1 = call i8 @llvm.scmp(i8 %x, i8 %y)
ret i8 %1
}
define i8 @scmp.8.16(i16 signext %x, i16 signext %y) nounwind {
; CHECK-LABEL: scmp.8.16:
; CHECK: # %bb.0:
; CHECK-NEXT: slt $a2, $a0, $a1
; CHECK-NEXT: slt $a0, $a1, $a0
; CHECK-NEXT: sub.d $a0, $a0, $a2
; CHECK-NEXT: ret
%1 = call i8 @llvm.scmp(i16 %x, i16 %y)
ret i8 %1
}
define i8 @scmp.8.32(i32 %x, i32 %y) nounwind {
; CHECK-LABEL: scmp.8.32:
; CHECK: # %bb.0:
; CHECK-NEXT: addi.w $a1, $a1, 0
; CHECK-NEXT: addi.w $a0, $a0, 0
; CHECK-NEXT: slt $a2, $a0, $a1
; CHECK-NEXT: slt $a0, $a1, $a0
; CHECK-NEXT: sub.d $a0, $a0, $a2
; CHECK-NEXT: ret
%1 = call i8 @llvm.scmp(i32 %x, i32 %y)
ret i8 %1
}
define i8 @scmp.8.64(i64 %x, i64 %y) nounwind {
; CHECK-LABEL: scmp.8.64:
; CHECK: # %bb.0:
; CHECK-NEXT: slt $a2, $a0, $a1
; CHECK-NEXT: slt $a0, $a1, $a0
; CHECK-NEXT: sub.d $a0, $a0, $a2
; CHECK-NEXT: ret
%1 = call i8 @llvm.scmp(i64 %x, i64 %y)
ret i8 %1
}
define i8 @scmp.8.128(i128 %x, i128 %y) nounwind {
; CHECK-LABEL: scmp.8.128:
; CHECK: # %bb.0:
; CHECK-NEXT: slt $a4, $a1, $a3
; CHECK-NEXT: xor $a5, $a1, $a3
; CHECK-NEXT: sltui $a5, $a5, 1
; CHECK-NEXT: masknez $a4, $a4, $a5
; CHECK-NEXT: sltu $a6, $a0, $a2
; CHECK-NEXT: maskeqz $a6, $a6, $a5
; CHECK-NEXT: or $a4, $a6, $a4
; CHECK-NEXT: slt $a1, $a3, $a1
; CHECK-NEXT: masknez $a1, $a1, $a5
; CHECK-NEXT: sltu $a0, $a2, $a0
; CHECK-NEXT: maskeqz $a0, $a0, $a5
; CHECK-NEXT: or $a0, $a0, $a1
; CHECK-NEXT: sub.d $a0, $a0, $a4
; CHECK-NEXT: ret
%1 = call i8 @llvm.scmp(i128 %x, i128 %y)
ret i8 %1
}
define i32 @scmp.32.32(i32 %x, i32 %y) nounwind {
; CHECK-LABEL: scmp.32.32:
; CHECK: # %bb.0:
; CHECK-NEXT: addi.w $a1, $a1, 0
; CHECK-NEXT: addi.w $a0, $a0, 0
; CHECK-NEXT: slt $a2, $a0, $a1
; CHECK-NEXT: slt $a0, $a1, $a0
; CHECK-NEXT: sub.d $a0, $a0, $a2
; CHECK-NEXT: ret
%1 = call i32 @llvm.scmp(i32 %x, i32 %y)
ret i32 %1
}
define i32 @scmp.32.64(i64 %x, i64 %y) nounwind {
; CHECK-LABEL: scmp.32.64:
; CHECK: # %bb.0:
; CHECK-NEXT: slt $a2, $a0, $a1
; CHECK-NEXT: slt $a0, $a1, $a0
; CHECK-NEXT: sub.d $a0, $a0, $a2
; CHECK-NEXT: ret
%1 = call i32 @llvm.scmp(i64 %x, i64 %y)
ret i32 %1
}
define i64 @scmp.64.64(i64 %x, i64 %y) nounwind {
; CHECK-LABEL: scmp.64.64:
; CHECK: # %bb.0:
; CHECK-NEXT: slt $a2, $a0, $a1
; CHECK-NEXT: slt $a0, $a1, $a0
; CHECK-NEXT: sub.d $a0, $a0, $a2
; CHECK-NEXT: ret
%1 = call i64 @llvm.scmp(i64 %x, i64 %y)
ret i64 %1
}
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