1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
|
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=riscv32 -mattr=+zbb -run-pass=instruction-select \
# RUN: -simplify-mir -verify-machineinstrs %s -o - \
# RUN: | FileCheck -check-prefix=RV32I %s
---
name: smax_i32
legalized: true
regBankSelected: true
body: |
bb.0.entry:
; RV32I-LABEL: name: smax_i32
; RV32I: [[COPY:%[0-9]+]]:gpr = COPY $x10
; RV32I-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
; RV32I-NEXT: [[MAX:%[0-9]+]]:gpr = MAX [[COPY]], [[COPY1]]
; RV32I-NEXT: $x10 = COPY [[MAX]]
; RV32I-NEXT: PseudoRET implicit $x10
%0:gprb(s32) = COPY $x10
%1:gprb(s32) = COPY $x11
%2:gprb(s32) = G_SMAX %0, %1
$x10 = COPY %2(s32)
PseudoRET implicit $x10
...
---
name: smin_i32
legalized: true
regBankSelected: true
body: |
bb.0.entry:
; RV32I-LABEL: name: smin_i32
; RV32I: [[COPY:%[0-9]+]]:gpr = COPY $x10
; RV32I-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
; RV32I-NEXT: [[MIN:%[0-9]+]]:gpr = MIN [[COPY]], [[COPY1]]
; RV32I-NEXT: $x10 = COPY [[MIN]]
; RV32I-NEXT: PseudoRET implicit $x10
%0:gprb(s32) = COPY $x10
%1:gprb(s32) = COPY $x11
%2:gprb(s32) = G_SMIN %0, %1
$x10 = COPY %2(s32)
PseudoRET implicit $x10
...
---
name: umax_i32
legalized: true
regBankSelected: true
body: |
bb.0.entry:
; RV32I-LABEL: name: umax_i32
; RV32I: [[COPY:%[0-9]+]]:gpr = COPY $x10
; RV32I-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
; RV32I-NEXT: [[MAXU:%[0-9]+]]:gpr = MAXU [[COPY]], [[COPY1]]
; RV32I-NEXT: $x10 = COPY [[MAXU]]
; RV32I-NEXT: PseudoRET implicit $x10
%0:gprb(s32) = COPY $x10
%1:gprb(s32) = COPY $x11
%2:gprb(s32) = G_UMAX %0, %1
$x10 = COPY %2(s32)
PseudoRET implicit $x10
...
---
name: umin_i32
legalized: true
regBankSelected: true
body: |
bb.0.entry:
; RV32I-LABEL: name: umin_i32
; RV32I: [[COPY:%[0-9]+]]:gpr = COPY $x10
; RV32I-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
; RV32I-NEXT: [[MINU:%[0-9]+]]:gpr = MINU [[COPY]], [[COPY1]]
; RV32I-NEXT: $x10 = COPY [[MINU]]
; RV32I-NEXT: PseudoRET implicit $x10
%0:gprb(s32) = COPY $x10
%1:gprb(s32) = COPY $x11
%2:gprb(s32) = G_UMIN %0, %1
$x10 = COPY %2(s32)
PseudoRET implicit $x10
...
|
