File: int-move-03.ll

package info (click to toggle)
llvm-toolchain-19 1%3A19.1.7-3
  • links: PTS, VCS
  • area: main
  • in suites: forky, sid, trixie
  • size: 1,998,520 kB
  • sloc: cpp: 6,951,680; ansic: 1,486,157; asm: 913,598; python: 232,024; f90: 80,126; objc: 75,281; lisp: 37,276; pascal: 16,990; sh: 10,009; ml: 5,058; perl: 4,724; awk: 3,523; makefile: 3,167; javascript: 2,504; xml: 892; fortran: 664; cs: 573
file content (78 lines) | stat: -rw-r--r-- 1,887 bytes parent folder | download | duplicates (12)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
; Test 64-bit GPR loads.
;
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s

; Check LG with no displacement.
define i64 @f1(ptr %src) {
; CHECK-LABEL: f1:
; CHECK: lg %r2, 0(%r2)
; CHECK: br %r14
  %val = load i64, ptr %src
  ret i64 %val
}

; Check the high end of the aligned LG range.
define i64 @f2(ptr %src) {
; CHECK-LABEL: f2:
; CHECK: lg %r2, 524280(%r2)
; CHECK: br %r14
  %ptr = getelementptr i64, ptr %src, i64 65535
  %val = load i64, ptr %ptr
  ret i64 %val
}

; Check the next doubleword up, which needs separate address logic.
; Other sequences besides this one would be OK.
define i64 @f3(ptr %src) {
; CHECK-LABEL: f3:
; CHECK: agfi %r2, 524288
; CHECK: lg %r2, 0(%r2)
; CHECK: br %r14
  %ptr = getelementptr i64, ptr %src, i64 65536
  %val = load i64, ptr %ptr
  ret i64 %val
}

; Check the high end of the negative aligned LG range.
define i64 @f4(ptr %src) {
; CHECK-LABEL: f4:
; CHECK: lg %r2, -8(%r2)
; CHECK: br %r14
  %ptr = getelementptr i64, ptr %src, i64 -1
  %val = load i64, ptr %ptr
  ret i64 %val
}

; Check the low end of the LG range.
define i64 @f5(ptr %src) {
; CHECK-LABEL: f5:
; CHECK: lg %r2, -524288(%r2)
; CHECK: br %r14
  %ptr = getelementptr i64, ptr %src, i64 -65536
  %val = load i64, ptr %ptr
  ret i64 %val
}

; Check the next doubleword down, which needs separate address logic.
; Other sequences besides this one would be OK.
define i64 @f6(ptr %src) {
; CHECK-LABEL: f6:
; CHECK: agfi %r2, -524296
; CHECK: lg %r2, 0(%r2)
; CHECK: br %r14
  %ptr = getelementptr i64, ptr %src, i64 -65537
  %val = load i64, ptr %ptr
  ret i64 %val
}

; Check that LG allows an index.
define i64 @f7(i64 %src, i64 %index) {
; CHECK-LABEL: f7:
; CHECK: lg %r2, 524287({{%r3,%r2|%r2,%r3}})
; CHECK: br %r14
  %add1 = add i64 %src, %index
  %add2 = add i64 %add1, 524287
  %ptr = inttoptr i64 %add2 to ptr
  %val = load i64, ptr %ptr
  ret i64 %val
}