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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=x86_64-- -run-pass=machine-sink -o - %s | FileCheck %s
---
name: foo
alignment: 16
tracksRegLiveness: true
registers:
- { id: 0, class: gr32 }
- { id: 1, class: gr32 }
- { id: 2, class: gr32 }
- { id: 3, class: gr32 }
frameInfo:
maxAlignment: 4
machineFunctionInfo: {}
body: |
; CHECK-LABEL: name: foo
; CHECK: bb.0.entry:
; CHECK-NEXT: successors: %bb.2(0x80000000)
; CHECK-NEXT: liveins: $edi, $esi
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: JMP_1 %bb.2
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
; CHECK-NEXT: successors: %bb.2(0x80000000)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[MOV32rr:%[0-9]+]]:gr32 = MOV32rr undef %1:gr32
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2:
; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.3(0x40000000)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[MOV32rr1:%[0-9]+]]:gr32 = MOV32rr undef %3:gr32
; CHECK-NEXT: JCC_1 %bb.1, 15, implicit undef $eflags
; CHECK-NEXT: JMP_1 %bb.3
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.3:
; CHECK-NEXT: successors: %bb.3(0x40000000), %bb.4(0x40000000)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: MOV32mr $rip, 1, $noreg, 12, $noreg, [[MOV32rr1]]
; CHECK-NEXT: JCC_1 %bb.3, 15, implicit undef $eflags
; CHECK-NEXT: JMP_1 %bb.4
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.4:
; CHECK-NEXT: RET 0, undef $eax
bb.0.entry:
liveins: $edi, $esi
JMP_1 %bb.2
bb.1:
%0:gr32 = MOV32rr undef %1:gr32
bb.2:
%2:gr32 = MOV32rr undef %3:gr32
JCC_1 %bb.1, 15, undef implicit $eflags
JMP_1 %bb.3
bb.3:
MOV32mr $rip, 1, $noreg, 12, $noreg, %2
JCC_1 %bb.3, 15, undef implicit $eflags
JMP_1 %bb.4
bb.4:
RET 0, undef $eax
...
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