1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
|
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -passes=nsan -nsan-shadow-type-mapping=dqq -S %s | FileCheck %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
; Tests with memory manipulation (memcpy, llvm.memcpy, ...).
declare void @llvm.memcpy.p0i8.p0i8.i64(i8*, i8*, i64, i1)
define void @call_memcpy_intrinsic(i8* nonnull align 8 dereferenceable(16) %a, i8* nonnull align 8 dereferenceable(16) %b) sanitize_numerical_stability {
; CHECK-LABEL: @call_memcpy_intrinsic(
; CHECK-NEXT: entry:
; CHECK-NEXT: call void @__nsan_copy_values(ptr [[A:%.*]], ptr [[B:%.*]], i64 16)
; CHECK-NEXT: tail call void @llvm.memcpy.p0.p0.i64(ptr nonnull align 8 dereferenceable(16) [[A]], ptr nonnull align 8 dereferenceable(16) [[B]], i64 16, i1 false)
; CHECK-NEXT: ret void
;
entry:
tail call void @llvm.memcpy.p0i8.p0i8.i64(ptr nonnull align 8 dereferenceable(16) %a, ptr nonnull align 8 dereferenceable(16) %b, i64 16, i1 false)
ret void
}
declare dso_local i8* @memcpy(i8*, i8*, i64) local_unnamed_addr
define void @call_memcpy(i8* nonnull align 8 dereferenceable(16) %a, i8* nonnull align 8 dereferenceable(16) %b) sanitize_numerical_stability {
; CHECK-LABEL: @call_memcpy(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = tail call ptr @memcpy(ptr nonnull align 8 dereferenceable(16) [[A:%.*]], ptr nonnull align 8 dereferenceable(16) [[B:%.*]], i64 16) #[[ATTR3:[0-9]+]]
; CHECK-NEXT: ret void
;
entry:
tail call i8* @memcpy(ptr nonnull align 8 dereferenceable(16) %a, ptr nonnull align 8 dereferenceable(16) %b, i64 16)
ret void
}
define void @transfer_float(float* %dst, float* %src) sanitize_numerical_stability {
; CHECK-LABEL: @transfer_float(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[T:%.*]] = load float, ptr [[SRC:%.*]], align 4
; CHECK-NEXT: [[TMP0:%.*]] = call ptr @__nsan_get_shadow_ptr_for_float_load(ptr [[SRC]], i64 1)
; CHECK-NEXT: [[TMP1:%.*]] = icmp eq ptr [[TMP0]], null
; CHECK-NEXT: br i1 [[TMP1]], label [[TMP4:%.*]], label [[TMP2:%.*]]
; CHECK: 2:
; CHECK-NEXT: [[TMP3:%.*]] = load double, ptr [[TMP0]], align 1
; CHECK-NEXT: br label [[TMP6:%.*]]
; CHECK: 4:
; CHECK-NEXT: [[TMP5:%.*]] = fpext float [[T]] to double
; CHECK-NEXT: br label [[TMP6]]
; CHECK: 6:
; CHECK-NEXT: [[TMP7:%.*]] = phi double [ [[TMP3]], [[TMP2]] ], [ [[TMP5]], [[TMP4]] ]
; CHECK-NEXT: [[TMP8:%.*]] = call ptr @__nsan_get_shadow_ptr_for_float_store(ptr [[DST:%.*]], i64 1)
; CHECK-NEXT: [[TMP9:%.*]] = ptrtoint ptr [[DST]] to i64
; CHECK-NEXT: [[TMP10:%.*]] = call i32 @__nsan_internal_check_float_d(float [[T]], double [[TMP7]], i32 4, i64 [[TMP9]])
; CHECK-NEXT: [[TMP11:%.*]] = icmp eq i32 [[TMP10]], 1
; CHECK-NEXT: [[TMP12:%.*]] = fpext float [[T]] to double
; CHECK-NEXT: [[TMP13:%.*]] = select i1 [[TMP11]], double [[TMP12]], double [[TMP7]]
; CHECK-NEXT: store double [[TMP13]], ptr [[TMP8]], align 1
; CHECK-NEXT: store float [[T]], ptr [[DST]], align 1
; CHECK-NEXT: ret void
;
entry:
%t = load float, ptr %src
store float %t, ptr %dst, align 1
ret void
}
define void @transfer_non_float(i32* %dst, i32* %src) sanitize_numerical_stability {
; CHECK-LABEL: @transfer_non_float(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[T:%.*]] = load i32, ptr [[SRC:%.*]], align 4
; CHECK-NEXT: [[TMP0:%.*]] = call ptr @__nsan_internal_get_raw_shadow_type_ptr(ptr [[SRC]])
; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 1
; CHECK-NEXT: [[TMP2:%.*]] = call ptr @__nsan_internal_get_raw_shadow_ptr(ptr [[SRC]])
; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 1
; CHECK-NEXT: store i32 [[T]], ptr [[DST:%.*]], align 1
; CHECK-NEXT: [[TMP4:%.*]] = call ptr @__nsan_internal_get_raw_shadow_type_ptr(ptr [[DST]])
; CHECK-NEXT: store i32 [[TMP1]], ptr [[TMP4]], align 1
; CHECK-NEXT: [[TMP5:%.*]] = call ptr @__nsan_internal_get_raw_shadow_ptr(ptr [[DST]])
; CHECK-NEXT: store i64 [[TMP3]], ptr [[TMP5]], align 1
; CHECK-NEXT: ret void
;
entry:
%t = load i32, ptr %src
store i32 %t, ptr %dst, align 1
ret void
}
define void @transfer_array([2 x float]* %a) sanitize_numerical_stability {
; CHECK-LABEL: @transfer_array(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[B:%.*]] = load [2 x float], ptr [[A:%.*]], align 1
; CHECK-NEXT: [[TMP0:%.*]] = call ptr @__nsan_internal_get_raw_shadow_type_ptr(ptr [[A]])
; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr [[TMP0]], align 1
; CHECK-NEXT: [[TMP2:%.*]] = call ptr @__nsan_internal_get_raw_shadow_ptr(ptr [[A]])
; CHECK-NEXT: [[TMP3:%.*]] = load i128, ptr [[TMP2]], align 1
; CHECK-NEXT: store [2 x float] [[B]], ptr [[A]], align 1
; CHECK-NEXT: [[TMP4:%.*]] = call ptr @__nsan_internal_get_raw_shadow_type_ptr(ptr [[A]])
; CHECK-NEXT: store i64 [[TMP1]], ptr [[TMP4]], align 1
; CHECK-NEXT: [[TMP5:%.*]] = call ptr @__nsan_internal_get_raw_shadow_ptr(ptr [[A]])
; CHECK-NEXT: store i128 [[TMP3]], ptr [[TMP5]], align 1
; CHECK-NEXT: ret void
;
entry:
%b = load [2 x float], ptr %a, align 1
store [2 x float] %b, ptr %a, align 1
ret void
}
define void @swap_untyped1(i64* nonnull align 8 %p, i64* nonnull align 8 %q) sanitize_numerical_stability {
; CHECK-LABEL: @swap_untyped1(
; CHECK-NEXT: [[QV:%.*]] = load i64, ptr [[Q:%.*]], align 8
; CHECK-NEXT: [[TMP1:%.*]] = call ptr @__nsan_internal_get_raw_shadow_type_ptr(ptr [[Q]])
; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr [[TMP1]], align 1
; CHECK-NEXT: [[TMP3:%.*]] = call ptr @__nsan_internal_get_raw_shadow_ptr(ptr [[Q]])
; CHECK-NEXT: [[TMP4:%.*]] = load i128, ptr [[TMP3]], align 1
; CHECK-NEXT: [[PV:%.*]] = load i64, ptr [[P:%.*]], align 8
; CHECK-NEXT: [[TMP5:%.*]] = call ptr @__nsan_internal_get_raw_shadow_type_ptr(ptr [[P]])
; CHECK-NEXT: [[TMP6:%.*]] = load i64, ptr [[TMP5]], align 1
; CHECK-NEXT: [[TMP7:%.*]] = call ptr @__nsan_internal_get_raw_shadow_ptr(ptr [[P]])
; CHECK-NEXT: [[TMP8:%.*]] = load i128, ptr [[TMP7]], align 1
; CHECK-NEXT: store i64 [[PV]], ptr [[Q]], align 8
; CHECK-NEXT: [[TMP9:%.*]] = call ptr @__nsan_internal_get_raw_shadow_type_ptr(ptr [[Q]])
; CHECK-NEXT: store i64 [[TMP6]], ptr [[TMP9]], align 1
; CHECK-NEXT: [[TMP10:%.*]] = call ptr @__nsan_internal_get_raw_shadow_ptr(ptr [[Q]])
; CHECK-NEXT: store i128 [[TMP8]], ptr [[TMP10]], align 1
; CHECK-NEXT: store i64 [[QV]], ptr [[P]], align 8
; CHECK-NEXT: [[TMP11:%.*]] = call ptr @__nsan_internal_get_raw_shadow_type_ptr(ptr [[P]])
; CHECK-NEXT: store i64 [[TMP2]], ptr [[TMP11]], align 1
; CHECK-NEXT: [[TMP12:%.*]] = call ptr @__nsan_internal_get_raw_shadow_ptr(ptr [[P]])
; CHECK-NEXT: store i128 [[TMP4]], ptr [[TMP12]], align 1
; CHECK-NEXT: ret void
;
%qv = load i64, ptr %q
%pv = load i64, ptr %p
store i64 %pv, ptr %q, align 8
store i64 %qv, ptr %p, align 8
ret void
}
; Same as swap_untyped1, but the load/stores are in the opposite order.
define void @swap_untyped2(i64* nonnull align 8 %p, i64* nonnull align 8 %q) sanitize_numerical_stability {
; CHECK-LABEL: @swap_untyped2(
; CHECK-NEXT: [[PV:%.*]] = load i64, ptr [[P:%.*]], align 8
; CHECK-NEXT: [[TMP1:%.*]] = call ptr @__nsan_internal_get_raw_shadow_type_ptr(ptr [[P]])
; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr [[TMP1]], align 1
; CHECK-NEXT: [[TMP3:%.*]] = call ptr @__nsan_internal_get_raw_shadow_ptr(ptr [[P]])
; CHECK-NEXT: [[TMP4:%.*]] = load i128, ptr [[TMP3]], align 1
; CHECK-NEXT: [[QV:%.*]] = load i64, ptr [[Q:%.*]], align 8
; CHECK-NEXT: [[TMP5:%.*]] = call ptr @__nsan_internal_get_raw_shadow_type_ptr(ptr [[Q]])
; CHECK-NEXT: [[TMP6:%.*]] = load i64, ptr [[TMP5]], align 1
; CHECK-NEXT: [[TMP7:%.*]] = call ptr @__nsan_internal_get_raw_shadow_ptr(ptr [[Q]])
; CHECK-NEXT: [[TMP8:%.*]] = load i128, ptr [[TMP7]], align 1
; CHECK-NEXT: store i64 [[PV]], ptr [[Q]], align 8
; CHECK-NEXT: [[TMP9:%.*]] = call ptr @__nsan_internal_get_raw_shadow_type_ptr(ptr [[Q]])
; CHECK-NEXT: store i64 [[TMP2]], ptr [[TMP9]], align 1
; CHECK-NEXT: [[TMP10:%.*]] = call ptr @__nsan_internal_get_raw_shadow_ptr(ptr [[Q]])
; CHECK-NEXT: store i128 [[TMP4]], ptr [[TMP10]], align 1
; CHECK-NEXT: store i64 [[QV]], ptr [[P]], align 8
; CHECK-NEXT: [[TMP11:%.*]] = call ptr @__nsan_internal_get_raw_shadow_type_ptr(ptr [[P]])
; CHECK-NEXT: store i64 [[TMP6]], ptr [[TMP11]], align 1
; CHECK-NEXT: [[TMP12:%.*]] = call ptr @__nsan_internal_get_raw_shadow_ptr(ptr [[P]])
; CHECK-NEXT: store i128 [[TMP8]], ptr [[TMP12]], align 1
; CHECK-NEXT: ret void
;
%pv = load i64, ptr %p
%qv = load i64, ptr %q
store i64 %pv, ptr %q, align 8
store i64 %qv, ptr %p, align 8
ret void
}
define void @swap_ft1(float* nonnull align 8 %p, float* nonnull align 8 %q) sanitize_numerical_stability {
; CHECK-LABEL: @swap_ft1(
; CHECK-NEXT: [[QV:%.*]] = load float, ptr [[Q:%.*]], align 4
; CHECK-NEXT: [[TMP1:%.*]] = call ptr @__nsan_get_shadow_ptr_for_float_load(ptr [[Q]], i64 1)
; CHECK-NEXT: [[TMP2:%.*]] = icmp eq ptr [[TMP1]], null
; CHECK-NEXT: br i1 [[TMP2]], label [[TMP5:%.*]], label [[TMP3:%.*]]
; CHECK: 3:
; CHECK-NEXT: [[TMP4:%.*]] = load double, ptr [[TMP1]], align 1
; CHECK-NEXT: br label [[TMP7:%.*]]
; CHECK: 5:
; CHECK-NEXT: [[TMP6:%.*]] = fpext float [[QV]] to double
; CHECK-NEXT: br label [[TMP7]]
; CHECK: 7:
; CHECK-NEXT: [[TMP8:%.*]] = phi double [ [[TMP4]], [[TMP3]] ], [ [[TMP6]], [[TMP5]] ]
; CHECK-NEXT: [[PV:%.*]] = load float, ptr [[P:%.*]], align 4
; CHECK-NEXT: [[TMP9:%.*]] = call ptr @__nsan_get_shadow_ptr_for_float_load(ptr [[P]], i64 1)
; CHECK-NEXT: [[TMP10:%.*]] = icmp eq ptr [[TMP9]], null
; CHECK-NEXT: br i1 [[TMP10]], label [[TMP13:%.*]], label [[TMP11:%.*]]
; CHECK: 11:
; CHECK-NEXT: [[TMP12:%.*]] = load double, ptr [[TMP9]], align 1
; CHECK-NEXT: br label [[TMP15:%.*]]
; CHECK: 13:
; CHECK-NEXT: [[TMP14:%.*]] = fpext float [[PV]] to double
; CHECK-NEXT: br label [[TMP15]]
; CHECK: 15:
; CHECK-NEXT: [[TMP16:%.*]] = phi double [ [[TMP12]], [[TMP11]] ], [ [[TMP14]], [[TMP13]] ]
; CHECK-NEXT: [[TMP17:%.*]] = call ptr @__nsan_get_shadow_ptr_for_float_store(ptr [[Q]], i64 1)
; CHECK-NEXT: [[TMP18:%.*]] = ptrtoint ptr [[Q]] to i64
; CHECK-NEXT: [[TMP19:%.*]] = call i32 @__nsan_internal_check_float_d(float [[PV]], double [[TMP16]], i32 4, i64 [[TMP18]])
; CHECK-NEXT: [[TMP20:%.*]] = icmp eq i32 [[TMP19]], 1
; CHECK-NEXT: [[TMP21:%.*]] = fpext float [[PV]] to double
; CHECK-NEXT: [[TMP22:%.*]] = select i1 [[TMP20]], double [[TMP21]], double [[TMP16]]
; CHECK-NEXT: store double [[TMP22]], ptr [[TMP17]], align 1
; CHECK-NEXT: store float [[PV]], ptr [[Q]], align 8
; CHECK-NEXT: [[TMP23:%.*]] = call ptr @__nsan_get_shadow_ptr_for_float_store(ptr [[P]], i64 1)
; CHECK-NEXT: [[TMP24:%.*]] = ptrtoint ptr [[P]] to i64
; CHECK-NEXT: [[TMP25:%.*]] = call i32 @__nsan_internal_check_float_d(float [[QV]], double [[TMP8]], i32 4, i64 [[TMP24]])
; CHECK-NEXT: [[TMP26:%.*]] = icmp eq i32 [[TMP25]], 1
; CHECK-NEXT: [[TMP27:%.*]] = fpext float [[QV]] to double
; CHECK-NEXT: [[TMP28:%.*]] = select i1 [[TMP26]], double [[TMP27]], double [[TMP8]]
; CHECK-NEXT: store double [[TMP28]], ptr [[TMP23]], align 1
; CHECK-NEXT: store float [[QV]], ptr [[P]], align 8
; CHECK-NEXT: ret void
;
%qv = load float, ptr %q
%pv = load float, ptr %p
store float %pv, ptr %q, align 8
store float %qv, ptr %p, align 8
ret void
}
; Same as swap_ft1, but the load/stores are in the opposite order.
define void @swap_ft2(float* nonnull align 8 %p, float* nonnull align 8 %q) sanitize_numerical_stability {
; CHECK-LABEL: @swap_ft2(
; CHECK-NEXT: [[PV:%.*]] = load float, ptr [[P:%.*]], align 4
; CHECK-NEXT: [[TMP1:%.*]] = call ptr @__nsan_get_shadow_ptr_for_float_load(ptr [[P]], i64 1)
; CHECK-NEXT: [[TMP2:%.*]] = icmp eq ptr [[TMP1]], null
; CHECK-NEXT: br i1 [[TMP2]], label [[TMP5:%.*]], label [[TMP3:%.*]]
; CHECK: 3:
; CHECK-NEXT: [[TMP4:%.*]] = load double, ptr [[TMP1]], align 1
; CHECK-NEXT: br label [[TMP7:%.*]]
; CHECK: 5:
; CHECK-NEXT: [[TMP6:%.*]] = fpext float [[PV]] to double
; CHECK-NEXT: br label [[TMP7]]
; CHECK: 7:
; CHECK-NEXT: [[TMP8:%.*]] = phi double [ [[TMP4]], [[TMP3]] ], [ [[TMP6]], [[TMP5]] ]
; CHECK-NEXT: [[QV:%.*]] = load float, ptr [[Q:%.*]], align 4
; CHECK-NEXT: [[TMP9:%.*]] = call ptr @__nsan_get_shadow_ptr_for_float_load(ptr [[Q]], i64 1)
; CHECK-NEXT: [[TMP10:%.*]] = icmp eq ptr [[TMP9]], null
; CHECK-NEXT: br i1 [[TMP10]], label [[TMP13:%.*]], label [[TMP11:%.*]]
; CHECK: 11:
; CHECK-NEXT: [[TMP12:%.*]] = load double, ptr [[TMP9]], align 1
; CHECK-NEXT: br label [[TMP15:%.*]]
; CHECK: 13:
; CHECK-NEXT: [[TMP14:%.*]] = fpext float [[QV]] to double
; CHECK-NEXT: br label [[TMP15]]
; CHECK: 15:
; CHECK-NEXT: [[TMP16:%.*]] = phi double [ [[TMP12]], [[TMP11]] ], [ [[TMP14]], [[TMP13]] ]
; CHECK-NEXT: [[TMP17:%.*]] = call ptr @__nsan_get_shadow_ptr_for_float_store(ptr [[Q]], i64 1)
; CHECK-NEXT: [[TMP18:%.*]] = ptrtoint ptr [[Q]] to i64
; CHECK-NEXT: [[TMP19:%.*]] = call i32 @__nsan_internal_check_float_d(float [[PV]], double [[TMP8]], i32 4, i64 [[TMP18]])
; CHECK-NEXT: [[TMP20:%.*]] = icmp eq i32 [[TMP19]], 1
; CHECK-NEXT: [[TMP21:%.*]] = fpext float [[PV]] to double
; CHECK-NEXT: [[TMP22:%.*]] = select i1 [[TMP20]], double [[TMP21]], double [[TMP8]]
; CHECK-NEXT: store double [[TMP22]], ptr [[TMP17]], align 1
; CHECK-NEXT: store float [[PV]], ptr [[Q]], align 8
; CHECK-NEXT: [[TMP23:%.*]] = call ptr @__nsan_get_shadow_ptr_for_float_store(ptr [[P]], i64 1)
; CHECK-NEXT: [[TMP24:%.*]] = ptrtoint ptr [[P]] to i64
; CHECK-NEXT: [[TMP25:%.*]] = call i32 @__nsan_internal_check_float_d(float [[QV]], double [[TMP16]], i32 4, i64 [[TMP24]])
; CHECK-NEXT: [[TMP26:%.*]] = icmp eq i32 [[TMP25]], 1
; CHECK-NEXT: [[TMP27:%.*]] = fpext float [[QV]] to double
; CHECK-NEXT: [[TMP28:%.*]] = select i1 [[TMP26]], double [[TMP27]], double [[TMP16]]
; CHECK-NEXT: store double [[TMP28]], ptr [[TMP23]], align 1
; CHECK-NEXT: store float [[QV]], ptr [[P]], align 8
; CHECK-NEXT: ret void
;
%pv = load float, ptr %p
%qv = load float, ptr %q
store float %pv, ptr %q, align 8
store float %qv, ptr %p, align 8
ret void
}
define void @swap_vectorft1(<2 x float>* nonnull align 16 %p, <2 x float>* nonnull align 16 %q) sanitize_numerical_stability {
; CHECK-LABEL: @swap_vectorft1(
; CHECK-NEXT: [[QV:%.*]] = load <2 x float>, ptr [[Q:%.*]], align 8
; CHECK-NEXT: [[TMP1:%.*]] = call ptr @__nsan_get_shadow_ptr_for_float_load(ptr [[Q]], i64 2)
; CHECK-NEXT: [[TMP2:%.*]] = icmp eq ptr [[TMP1]], null
; CHECK-NEXT: br i1 [[TMP2]], label [[TMP5:%.*]], label [[TMP3:%.*]]
; CHECK: 3:
; CHECK-NEXT: [[TMP4:%.*]] = load <2 x double>, ptr [[TMP1]], align 1
; CHECK-NEXT: br label [[TMP7:%.*]]
; CHECK: 5:
; CHECK-NEXT: [[TMP6:%.*]] = fpext <2 x float> [[QV]] to <2 x double>
; CHECK-NEXT: br label [[TMP7]]
; CHECK: 7:
; CHECK-NEXT: [[TMP8:%.*]] = phi <2 x double> [ [[TMP4]], [[TMP3]] ], [ [[TMP6]], [[TMP5]] ]
; CHECK-NEXT: [[PV:%.*]] = load <2 x float>, ptr [[P:%.*]], align 8
; CHECK-NEXT: [[TMP9:%.*]] = call ptr @__nsan_get_shadow_ptr_for_float_load(ptr [[P]], i64 2)
; CHECK-NEXT: [[TMP10:%.*]] = icmp eq ptr [[TMP9]], null
; CHECK-NEXT: br i1 [[TMP10]], label [[TMP13:%.*]], label [[TMP11:%.*]]
; CHECK: 11:
; CHECK-NEXT: [[TMP12:%.*]] = load <2 x double>, ptr [[TMP9]], align 1
; CHECK-NEXT: br label [[TMP15:%.*]]
; CHECK: 13:
; CHECK-NEXT: [[TMP14:%.*]] = fpext <2 x float> [[PV]] to <2 x double>
; CHECK-NEXT: br label [[TMP15]]
; CHECK: 15:
; CHECK-NEXT: [[TMP16:%.*]] = phi <2 x double> [ [[TMP12]], [[TMP11]] ], [ [[TMP14]], [[TMP13]] ]
; CHECK-NEXT: [[TMP17:%.*]] = call ptr @__nsan_get_shadow_ptr_for_float_store(ptr [[Q]], i64 2)
; CHECK-NEXT: [[TMP18:%.*]] = extractelement <2 x float> [[PV]], i64 0
; CHECK-NEXT: [[TMP19:%.*]] = extractelement <2 x double> [[TMP16]], i64 0
; CHECK-NEXT: [[TMP20:%.*]] = ptrtoint ptr [[Q]] to i64
; CHECK-NEXT: [[TMP21:%.*]] = call i32 @__nsan_internal_check_float_d(float [[TMP18]], double [[TMP19]], i32 4, i64 [[TMP20]])
; CHECK-NEXT: [[TMP22:%.*]] = extractelement <2 x float> [[PV]], i64 1
; CHECK-NEXT: [[TMP23:%.*]] = extractelement <2 x double> [[TMP16]], i64 1
; CHECK-NEXT: [[TMP24:%.*]] = ptrtoint ptr [[Q]] to i64
; CHECK-NEXT: [[TMP25:%.*]] = call i32 @__nsan_internal_check_float_d(float [[TMP22]], double [[TMP23]], i32 4, i64 [[TMP24]])
; CHECK-NEXT: [[TMP26:%.*]] = or i32 [[TMP21]], [[TMP25]]
; CHECK-NEXT: [[TMP27:%.*]] = icmp eq i32 [[TMP26]], 1
; CHECK-NEXT: [[TMP28:%.*]] = fpext <2 x float> [[PV]] to <2 x double>
; CHECK-NEXT: [[TMP29:%.*]] = select i1 [[TMP27]], <2 x double> [[TMP28]], <2 x double> [[TMP16]]
; CHECK-NEXT: store <2 x double> [[TMP29]], ptr [[TMP17]], align 1
; CHECK-NEXT: store <2 x float> [[PV]], ptr [[Q]], align 16
; CHECK-NEXT: [[TMP30:%.*]] = call ptr @__nsan_get_shadow_ptr_for_float_store(ptr [[P]], i64 2)
; CHECK-NEXT: [[TMP31:%.*]] = extractelement <2 x float> [[QV]], i64 0
; CHECK-NEXT: [[TMP32:%.*]] = extractelement <2 x double> [[TMP8]], i64 0
; CHECK-NEXT: [[TMP33:%.*]] = ptrtoint ptr [[P]] to i64
; CHECK-NEXT: [[TMP34:%.*]] = call i32 @__nsan_internal_check_float_d(float [[TMP31]], double [[TMP32]], i32 4, i64 [[TMP33]])
; CHECK-NEXT: [[TMP35:%.*]] = extractelement <2 x float> [[QV]], i64 1
; CHECK-NEXT: [[TMP36:%.*]] = extractelement <2 x double> [[TMP8]], i64 1
; CHECK-NEXT: [[TMP37:%.*]] = ptrtoint ptr [[P]] to i64
; CHECK-NEXT: [[TMP38:%.*]] = call i32 @__nsan_internal_check_float_d(float [[TMP35]], double [[TMP36]], i32 4, i64 [[TMP37]])
; CHECK-NEXT: [[TMP39:%.*]] = or i32 [[TMP34]], [[TMP38]]
; CHECK-NEXT: [[TMP40:%.*]] = icmp eq i32 [[TMP39]], 1
; CHECK-NEXT: [[TMP41:%.*]] = fpext <2 x float> [[QV]] to <2 x double>
; CHECK-NEXT: [[TMP42:%.*]] = select i1 [[TMP40]], <2 x double> [[TMP41]], <2 x double> [[TMP8]]
; CHECK-NEXT: store <2 x double> [[TMP42]], ptr [[TMP30]], align 1
; CHECK-NEXT: store <2 x float> [[QV]], ptr [[P]], align 16
; CHECK-NEXT: ret void
;
%qv = load <2 x float>, ptr %q
%pv = load <2 x float>, ptr %p
store <2 x float> %pv, ptr %q, align 16
store <2 x float> %qv, ptr %p, align 16
ret void
}
; Same as swap_vectorft1, but the load/stores are in the opposite order.
define void @swap_vectorft2(<2 x float>* nonnull align 16 %p, <2 x float>* nonnull align 16 %q) sanitize_numerical_stability {
; CHECK-LABEL: @swap_vectorft2(
; CHECK-NEXT: [[PV:%.*]] = load <2 x float>, ptr [[P:%.*]], align 8
; CHECK-NEXT: [[TMP1:%.*]] = call ptr @__nsan_get_shadow_ptr_for_float_load(ptr [[P]], i64 2)
; CHECK-NEXT: [[TMP2:%.*]] = icmp eq ptr [[TMP1]], null
; CHECK-NEXT: br i1 [[TMP2]], label [[TMP5:%.*]], label [[TMP3:%.*]]
; CHECK: 3:
; CHECK-NEXT: [[TMP4:%.*]] = load <2 x double>, ptr [[TMP1]], align 1
; CHECK-NEXT: br label [[TMP7:%.*]]
; CHECK: 5:
; CHECK-NEXT: [[TMP6:%.*]] = fpext <2 x float> [[PV]] to <2 x double>
; CHECK-NEXT: br label [[TMP7]]
; CHECK: 7:
; CHECK-NEXT: [[TMP8:%.*]] = phi <2 x double> [ [[TMP4]], [[TMP3]] ], [ [[TMP6]], [[TMP5]] ]
; CHECK-NEXT: [[QV:%.*]] = load <2 x float>, ptr [[Q:%.*]], align 8
; CHECK-NEXT: [[TMP9:%.*]] = call ptr @__nsan_get_shadow_ptr_for_float_load(ptr [[Q]], i64 2)
; CHECK-NEXT: [[TMP10:%.*]] = icmp eq ptr [[TMP9]], null
; CHECK-NEXT: br i1 [[TMP10]], label [[TMP13:%.*]], label [[TMP11:%.*]]
; CHECK: 11:
; CHECK-NEXT: [[TMP12:%.*]] = load <2 x double>, ptr [[TMP9]], align 1
; CHECK-NEXT: br label [[TMP15:%.*]]
; CHECK: 13:
; CHECK-NEXT: [[TMP14:%.*]] = fpext <2 x float> [[QV]] to <2 x double>
; CHECK-NEXT: br label [[TMP15]]
; CHECK: 15:
; CHECK-NEXT: [[TMP16:%.*]] = phi <2 x double> [ [[TMP12]], [[TMP11]] ], [ [[TMP14]], [[TMP13]] ]
; CHECK-NEXT: [[TMP17:%.*]] = call ptr @__nsan_get_shadow_ptr_for_float_store(ptr [[Q]], i64 2)
; CHECK-NEXT: [[TMP18:%.*]] = extractelement <2 x float> [[PV]], i64 0
; CHECK-NEXT: [[TMP19:%.*]] = extractelement <2 x double> [[TMP8]], i64 0
; CHECK-NEXT: [[TMP20:%.*]] = ptrtoint ptr [[Q]] to i64
; CHECK-NEXT: [[TMP21:%.*]] = call i32 @__nsan_internal_check_float_d(float [[TMP18]], double [[TMP19]], i32 4, i64 [[TMP20]])
; CHECK-NEXT: [[TMP22:%.*]] = extractelement <2 x float> [[PV]], i64 1
; CHECK-NEXT: [[TMP23:%.*]] = extractelement <2 x double> [[TMP8]], i64 1
; CHECK-NEXT: [[TMP24:%.*]] = ptrtoint ptr [[Q]] to i64
; CHECK-NEXT: [[TMP25:%.*]] = call i32 @__nsan_internal_check_float_d(float [[TMP22]], double [[TMP23]], i32 4, i64 [[TMP24]])
; CHECK-NEXT: [[TMP26:%.*]] = or i32 [[TMP21]], [[TMP25]]
; CHECK-NEXT: [[TMP27:%.*]] = icmp eq i32 [[TMP26]], 1
; CHECK-NEXT: [[TMP28:%.*]] = fpext <2 x float> [[PV]] to <2 x double>
; CHECK-NEXT: [[TMP29:%.*]] = select i1 [[TMP27]], <2 x double> [[TMP28]], <2 x double> [[TMP8]]
; CHECK-NEXT: store <2 x double> [[TMP29]], ptr [[TMP17]], align 1
; CHECK-NEXT: store <2 x float> [[PV]], ptr [[Q]], align 16
; CHECK-NEXT: [[TMP30:%.*]] = call ptr @__nsan_get_shadow_ptr_for_float_store(ptr [[P]], i64 2)
; CHECK-NEXT: [[TMP31:%.*]] = extractelement <2 x float> [[QV]], i64 0
; CHECK-NEXT: [[TMP32:%.*]] = extractelement <2 x double> [[TMP16]], i64 0
; CHECK-NEXT: [[TMP33:%.*]] = ptrtoint ptr [[P]] to i64
; CHECK-NEXT: [[TMP34:%.*]] = call i32 @__nsan_internal_check_float_d(float [[TMP31]], double [[TMP32]], i32 4, i64 [[TMP33]])
; CHECK-NEXT: [[TMP35:%.*]] = extractelement <2 x float> [[QV]], i64 1
; CHECK-NEXT: [[TMP36:%.*]] = extractelement <2 x double> [[TMP16]], i64 1
; CHECK-NEXT: [[TMP37:%.*]] = ptrtoint ptr [[P]] to i64
; CHECK-NEXT: [[TMP38:%.*]] = call i32 @__nsan_internal_check_float_d(float [[TMP35]], double [[TMP36]], i32 4, i64 [[TMP37]])
; CHECK-NEXT: [[TMP39:%.*]] = or i32 [[TMP34]], [[TMP38]]
; CHECK-NEXT: [[TMP40:%.*]] = icmp eq i32 [[TMP39]], 1
; CHECK-NEXT: [[TMP41:%.*]] = fpext <2 x float> [[QV]] to <2 x double>
; CHECK-NEXT: [[TMP42:%.*]] = select i1 [[TMP40]], <2 x double> [[TMP41]], <2 x double> [[TMP16]]
; CHECK-NEXT: store <2 x double> [[TMP42]], ptr [[TMP30]], align 1
; CHECK-NEXT: store <2 x float> [[QV]], ptr [[P]], align 16
; CHECK-NEXT: ret void
;
%pv = load <2 x float>, ptr %p
%qv = load <2 x float>, ptr %q
store <2 x float> %pv, ptr %q, align 16
store <2 x float> %qv, ptr %p, align 16
ret void
}
|
