File: gfx940_err_pos.s

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llvm-toolchain-19 1%3A19.1.7-3
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// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx940 %s 2>&1 | FileCheck %s --implicit-check-not=error: --strict-whitespace

//==============================================================================
// instruction must not use sc0

global_atomic_or v[0:1], v2, off sc1 nt sc0
// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: instruction must not use sc0
// CHECK-NEXT:{{^}}global_atomic_or v[0:1], v2, off sc1 nt sc0
// CHECK-NEXT:{{^}}                                        ^

global_atomic_or v[0:1], v2, off sc0 sc1 nt
// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: instruction must not use sc0
// CHECK-NEXT:{{^}}global_atomic_or v[0:1], v2, off sc0 sc1 nt
// CHECK-NEXT:{{^}}                                 ^