1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
|
; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,SI %s
; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,VI %s
; RUN: llc -march=amdgcn -mcpu=gfx1100 < %s | FileCheck -check-prefix=GFX11 %s
; Test that materialization constants that are the bit reversed of
; inline immediates are replaced with bfrev of the inline immediate to
; save code size.
; GCN-LABEL: {{^}}materialize_0_i32:
; GCN: v_mov_b32_e32 [[K:v[0-9]+]], 0{{$}}
; GCN: {{buffer|flat}}_store_dword {{.*}}[[K]]
define amdgpu_kernel void @materialize_0_i32(ptr addrspace(1) %out) {
store i32 0, ptr addrspace(1) %out
ret void
}
; GCN-LABEL: {{^}}materialize_0_i64:
; GCN: v_mov_b32_e32 v[[LOK:[0-9]+]], 0{{$}}
; GCN: v_mov_b32_e32 v[[HIK:[0-9]+]], v[[LOK]]{{$}}
; GCN: {{buffer|flat}}_store_dwordx2 {{.*}}v[[[LOK]]:[[HIK]]]
define amdgpu_kernel void @materialize_0_i64(ptr addrspace(1) %out) {
store i64 0, ptr addrspace(1) %out
ret void
}
; GCN-LABEL: {{^}}materialize_neg1_i32:
; GCN: v_mov_b32_e32 [[K:v[0-9]+]], -1{{$}}
; GCN: {{buffer|flat}}_store_dword {{.*}}[[K]]
define amdgpu_kernel void @materialize_neg1_i32(ptr addrspace(1) %out) {
store i32 -1, ptr addrspace(1) %out
ret void
}
; GCN-LABEL: {{^}}materialize_neg1_i64:
; GCN: v_mov_b32_e32 v[[LOK:[0-9]+]], -1{{$}}
; GCN: v_mov_b32_e32 v[[HIK:[0-9]+]], v[[LOK]]{{$}}
; GCN: {{buffer|flat}}_store_dwordx2 {{.*}}v[[[LOK]]:[[HIK]]]
define amdgpu_kernel void @materialize_neg1_i64(ptr addrspace(1) %out) {
store i64 -1, ptr addrspace(1) %out
ret void
}
; GCN-LABEL: {{^}}materialize_signbit_i32:
; GCN: v_bfrev_b32_e32 [[K:v[0-9]+]], 1{{$}}
; GCN: {{buffer|flat}}_store_dword {{.*}}[[K]]
define amdgpu_kernel void @materialize_signbit_i32(ptr addrspace(1) %out) {
store i32 -2147483648, ptr addrspace(1) %out
ret void
}
; GCN-LABEL: {{^}}materialize_signbit_i64:
; GCN-DAG: v_mov_b32_e32 v[[LOK:[0-9]+]], 0{{$}}
; GCN-DAG: v_bfrev_b32_e32 v[[HIK:[0-9]+]], 1{{$}}
; GCN: {{buffer|flat}}_store_dwordx2 {{.*}}v[[[LOK]]:[[HIK]]]
define amdgpu_kernel void @materialize_signbit_i64(ptr addrspace(1) %out) {
store i64 -9223372036854775808, ptr addrspace(1) %out
ret void
}
; GCN-LABEL: {{^}}materialize_rev_neg16_i32:
; GCN: v_bfrev_b32_e32 [[K:v[0-9]+]], -16{{$}}
; GCN: {{buffer|flat}}_store_dword {{.*}}[[K]]
define amdgpu_kernel void @materialize_rev_neg16_i32(ptr addrspace(1) %out) {
store i32 268435455, ptr addrspace(1) %out
ret void
}
; GCN-LABEL: {{^}}materialize_rev_neg16_i64:
; GCN-DAG: v_mov_b32_e32 v[[LOK:[0-9]+]], -1{{$}}
; GCN-DAG: v_bfrev_b32_e32 v[[HIK:[0-9]+]], -16{{$}}
; GCN: {{buffer|flat}}_store_dwordx2 {{.*}}v[[[LOK]]:[[HIK]]]
define amdgpu_kernel void @materialize_rev_neg16_i64(ptr addrspace(1) %out) {
store i64 1152921504606846975, ptr addrspace(1) %out
ret void
}
; GCN-LABEL: {{^}}materialize_rev_neg17_i32:
; GCN: v_mov_b32_e32 [[K:v[0-9]+]], 0xf7ffffff{{$}}
; GCN: {{buffer|flat}}_store_dword {{.*}}[[K]]
define amdgpu_kernel void @materialize_rev_neg17_i32(ptr addrspace(1) %out) {
store i32 -134217729, ptr addrspace(1) %out
ret void
}
; GCN-LABEL: {{^}}materialize_rev_neg17_i64:
; GCN-DAG: v_mov_b32_e32 v[[LOK:[0-9]+]], -1{{$}}
; GCN-DAG: v_mov_b32_e32 v[[HIK:[0-9]+]], 0xf7ffffff{{$}}
; GCN: {{buffer|flat}}_store_dwordx2 {{.*}}v[[[LOK]]:[[HIK]]]
define amdgpu_kernel void @materialize_rev_neg17_i64(ptr addrspace(1) %out) {
store i64 -576460752303423489, ptr addrspace(1) %out
ret void
}
; GCN-LABEL: {{^}}materialize_rev_64_i32:
; GCN: v_bfrev_b32_e32 [[K:v[0-9]+]], 64{{$}}
; GCN: {{buffer|flat}}_store_dword {{.*}}[[K]]
define amdgpu_kernel void @materialize_rev_64_i32(ptr addrspace(1) %out) {
store i32 33554432, ptr addrspace(1) %out
ret void
}
; GCN-LABEL: {{^}}materialize_rev_64_i64:
; GCN-DAG: v_mov_b32_e32 v[[LOK:[0-9]+]], 0{{$}}
; GCN-DAG: v_bfrev_b32_e32 v[[HIK:[0-9]+]], 64{{$}}
; GCN: {{buffer|flat}}_store_dwordx2 {{.*}}v[[[LOK]]:[[HIK]]]
define amdgpu_kernel void @materialize_rev_64_i64(ptr addrspace(1) %out) {
store i64 144115188075855872, ptr addrspace(1) %out
ret void
}
; GCN-LABEL: {{^}}materialize_rev_65_i32:
; GCN: v_mov_b32_e32 [[K:v[0-9]+]], 0x82000000{{$}}
; GCN: {{buffer|flat}}_store_dword {{.*}}[[K]]
define amdgpu_kernel void @materialize_rev_65_i32(ptr addrspace(1) %out) {
store i32 -2113929216, ptr addrspace(1) %out
ret void
}
; GCN-LABEL: {{^}}materialize_rev_65_i64:
; GCN-DAG: v_mov_b32_e32 v[[LOK:[0-9]+]], 0{{$}}
; GCN-DAG: v_mov_b32_e32 v[[HIK:[0-9]+]], 0x82000000{{$}}
; GCN: {{buffer|flat}}_store_dwordx2 {{.*}}v[[[LOK]]:[[HIK]]]
define amdgpu_kernel void @materialize_rev_65_i64(ptr addrspace(1) %out) {
store i64 -9079256848778919936, ptr addrspace(1) %out
ret void
}
; GCN-LABEL: {{^}}materialize_rev_3_i32:
; GCN: v_mov_b32_e32 [[K:v[0-9]+]], -2.0{{$}}
; GCN: {{buffer|flat}}_store_dword {{.*}}[[K]]
define amdgpu_kernel void @materialize_rev_3_i32(ptr addrspace(1) %out) {
store i32 -1073741824, ptr addrspace(1) %out
ret void
}
; GCN-LABEL: {{^}}materialize_rev_3_i64:
; GCN-DAG: v_mov_b32_e32 v[[LOK:[0-9]+]], 0{{$}}
; GCN-DAG: v_mov_b32_e32 v[[HIK:[0-9]+]], -2.0{{$}}
; GCN: {{buffer|flat}}_store_dwordx2 {{.*}}v[[[LOK]]:[[HIK]]]
define amdgpu_kernel void @materialize_rev_3_i64(ptr addrspace(1) %out) {
store i64 -4611686018427387904, ptr addrspace(1) %out
ret void
}
; GCN-LABEL: {{^}}materialize_rev_0.5_i32:
; GCN: v_bfrev_b32_e32 [[K:v[0-9]+]], 0.5{{$}}
; GCN: {{buffer|flat}}_store_dword {{.*}}[[K]]
define amdgpu_kernel void @materialize_rev_0.5_i32(ptr addrspace(1) %out) {
store i32 252, ptr addrspace(1) %out
ret void
}
; GCN-LABEL: {{^}}materialize_rev_1.0_i32:
; GCN: v_bfrev_b32_e32 [[K:v[0-9]+]], 1.0{{$}}
; GCN: {{buffer|flat}}_store_dword {{.*}}[[K]]
define amdgpu_kernel void @materialize_rev_1.0_i32(ptr addrspace(1) %out) {
store i32 508, ptr addrspace(1) %out
ret void
}
; GCN-LABEL: {{^}}materialize_rev_2.0_i32:
; GCN: v_mov_b32_e32 [[K:v[0-9]+]], 2{{$}}
; GCN: {{buffer|flat}}_store_dword {{.*}}[[K]]
define amdgpu_kernel void @materialize_rev_2.0_i32(ptr addrspace(1) %out) {
store i32 2, ptr addrspace(1) %out
ret void
}
; GCN-LABEL: {{^}}materialize_rev_4.0_i32:
; GCN: v_bfrev_b32_e32 [[K:v[0-9]+]], 4.0{{$}}
; GCN: {{buffer|flat}}_store_dword {{.*}}[[K]]
define amdgpu_kernel void @materialize_rev_4.0_i32(ptr addrspace(1) %out) {
store i32 258, ptr addrspace(1) %out
ret void
}
; GCN-LABEL: {{^}}materialize_rev_neg0.5_i32:
; GCN: v_bfrev_b32_e32 [[K:v[0-9]+]], -0.5{{$}}
; GCN: {{buffer|flat}}_store_dword {{.*}}[[K]]
define amdgpu_kernel void @materialize_rev_neg0.5_i32(ptr addrspace(1) %out) {
store i32 253, ptr addrspace(1) %out
ret void
}
; GCN-LABEL: {{^}}materialize_rev_neg1.0_i32:
; GCN: v_bfrev_b32_e32 [[K:v[0-9]+]], -1.0{{$}}
; GCN: {{buffer|flat}}_store_dword {{.*}}[[K]]
define amdgpu_kernel void @materialize_rev_neg1.0_i32(ptr addrspace(1) %out) {
store i32 509, ptr addrspace(1) %out
ret void
}
; GCN-LABEL: {{^}}materialize_rev_neg2.0_i32:
; GCN: v_mov_b32_e32 [[K:v[0-9]+]], 3{{$}}
; GCN: {{buffer|flat}}_store_dword {{.*}}[[K]]
define amdgpu_kernel void @materialize_rev_neg2.0_i32(ptr addrspace(1) %out) {
store i32 3, ptr addrspace(1) %out
ret void
}
; GCN-LABEL: {{^}}materialize_rev_neg4.0_i32:
; GCN: v_bfrev_b32_e32 [[K:v[0-9]+]], -4.0{{$}}
; GCN: {{buffer|flat}}_store_dword {{.*}}[[K]]
define amdgpu_kernel void @materialize_rev_neg4.0_i32(ptr addrspace(1) %out) {
store i32 259, ptr addrspace(1) %out
ret void
}
; GCN-LABEL: {{^}}materialize_rev_1.0_i64:
; GCN-DAG: v_bfrev_b32_e32 v[[LOK:[0-9]+]], 1.0{{$}}
; GCN-DAG: v_mov_b32_e32 v[[HIK:[0-9]+]], 0{{$}}
; GCN: {{buffer|flat}}_store_dwordx2 {{.*}}v[[[LOK]]:[[HIK]]]
define amdgpu_kernel void @materialize_rev_1.0_i64(ptr addrspace(1) %out) {
store i64 508, ptr addrspace(1) %out
ret void
}
; GCN-LABEL: {{^}}s_materialize_0_i32:
; GCN: s_mov_b32 s{{[0-9]+}}, 0{{$}}
define amdgpu_kernel void @s_materialize_0_i32() {
call void asm sideeffect "; use $0", "s"(i32 0)
ret void
}
; GCN-LABEL: {{^}}s_materialize_1_i32:
; GCN: s_mov_b32 s{{[0-9]+}}, 1{{$}}
define amdgpu_kernel void @s_materialize_1_i32() {
call void asm sideeffect "; use $0", "s"(i32 1)
ret void
}
; GCN-LABEL: {{^}}s_materialize_neg1_i32:
; GCN: s_mov_b32 s{{[0-9]+}}, -1{{$}}
define amdgpu_kernel void @s_materialize_neg1_i32() {
call void asm sideeffect "; use $0", "s"(i32 -1)
ret void
}
; GCN-LABEL: {{^}}s_materialize_signbit_i32:
; GCN: s_brev_b32 s{{[0-9]+}}, 1{{$}}
define amdgpu_kernel void @s_materialize_signbit_i32() {
call void asm sideeffect "; use $0", "s"(i32 -2147483648)
ret void
}
; GCN-LABEL: {{^}}s_materialize_rev_64_i32:
; GCN: s_brev_b32 s{{[0-9]+}}, 64{{$}}
define amdgpu_kernel void @s_materialize_rev_64_i32() {
call void asm sideeffect "; use $0", "s"(i32 33554432)
ret void
}
; GCN-LABEL: {{^}}s_materialize_rev_65_i32:
; GCN: s_mov_b32 s{{[0-9]+}}, 0x82000000{{$}}
define amdgpu_kernel void @s_materialize_rev_65_i32() {
call void asm sideeffect "; use $0", "s"(i32 -2113929216)
ret void
}
; GCN-LABEL: {{^}}s_materialize_rev_neg16_i32:
; GCN: s_brev_b32 s{{[0-9]+}}, -16{{$}}
define amdgpu_kernel void @s_materialize_rev_neg16_i32() {
call void asm sideeffect "; use $0", "s"(i32 268435455)
ret void
}
; GCN-LABEL: {{^}}s_materialize_rev_neg17_i32:
; GCN: s_mov_b32 s{{[0-9]+}}, 0xf7ffffff{{$}}
define amdgpu_kernel void @s_materialize_rev_neg17_i32() {
call void asm sideeffect "; use $0", "s"(i32 -134217729)
ret void
}
; GCN-LABEL: {{^}}s_materialize_rev_1.0_i32:
; GCN: s_movk_i32 s{{[0-9]+}}, 0x1fc{{$}}
define amdgpu_kernel void @s_materialize_rev_1.0_i32() {
call void asm sideeffect "; use $0", "s"(i32 508)
ret void
}
; GCN-LABEL: {{^}}s_materialize_not_1.0_i32:
; GCN: s_mov_b32 s{{[0-9]+}}, 0xc07fffff
define void @s_materialize_not_1.0_i32() {
call void asm sideeffect "; use $0", "s"(i32 -1065353217)
ret void
}
; GCN-LABEL: {{^}}s_materialize_not_neg_1.0_i32:
; GCN: s_mov_b32 s{{[0-9]+}}, 0x407fffff
define void @s_materialize_not_neg_1.0_i32() {
call void asm sideeffect "; use $0", "s"(i32 1082130431)
ret void
}
; GCN-LABEL: {{^}}s_materialize_not_inv2pi_i32:
; GCN: s_mov_b32 s{{[0-9]+}}, 0xc1dd067c
define void @s_materialize_not_inv2pi_i32() {
call void asm sideeffect "; use $0", "s"(i32 -1042479492)
ret void
}
; GCN-LABEL: {{^}}s_materialize_not_neg_inv2pi_i32:
; GCN: s_mov_b32 s{{[0-9]+}}, 0x41dd067c
define void @s_materialize_not_neg_inv2pi_i32() {
call void asm sideeffect "; use $0", "s"(i32 1105004156)
ret void
}
; GCN-LABEL: {{^}}materialize_not_0.5_i32:
; GCN: v_not_b32_e32 v{{[0-9]+}}, 0.5
define void @materialize_not_0.5_i32(ptr addrspace(1) %out) {
store i32 -1056964609, ptr addrspace(1) %out
ret void
}
; GCN-LABEL: {{^}}materialize_not_1.0_i32:
; GCN: v_not_b32_e32 v{{[0-9]+}}, 1.0
define void @materialize_not_1.0_i32(ptr addrspace(1) %out) {
store i32 -1065353217, ptr addrspace(1) %out
ret void
}
; GCN-LABEL: {{^}}materialize_not_2.0_i32:
; GCN: v_not_b32_e32 v{{[0-9]+}}, 2.0
define void @materialize_not_2.0_i32(ptr addrspace(1) %out) {
store i32 -1073741825, ptr addrspace(1) %out
ret void
}
; GCN-LABEL: {{^}}materialize_not_4.0_i32:
; GCN: v_not_b32_e32 v{{[0-9]+}}, 4.0
define void @materialize_not_4.0_i32(ptr addrspace(1) %out) {
store i32 -1082130433, ptr addrspace(1) %out
ret void
}
; GCN-LABEL: {{^}}materialize_not_neg_0.5_i32:
; GCN: v_not_b32_e32 v{{[0-9]+}}, -0.5
define void @materialize_not_neg_0.5_i32(ptr addrspace(1) %out) {
store i32 1090519039, ptr addrspace(1) %out
ret void
}
; GCN-LABEL: {{^}}materialize_not_neg_1.0_i32:
; GCN: v_not_b32_e32 v{{[0-9]+}}, -1.0
define void @materialize_not_neg_1.0_i32(ptr addrspace(1) %out) {
store i32 1082130431, ptr addrspace(1) %out
ret void
}
; GCN-LABEL: {{^}}materialize_not_neg2.0_i32:
; GCN: v_not_b32_e32 v{{[0-9]+}}, -2.0
define void @materialize_not_neg2.0_i32(ptr addrspace(1) %out) {
store i32 1073741823, ptr addrspace(1) %out
ret void
}
; GCN-LABEL: {{^}}materialize_not_neg4.0_i32:
; GCN: v_not_b32_e32 v{{[0-9]+}}, -4.0
define void @materialize_not_neg4.0_i32(ptr addrspace(1) %out) {
store i32 1065353215, ptr addrspace(1) %out
ret void
}
; GCN-LABEL: {{^}}materialize_not_inv2pi_i32:
; SI: v_mov_b32_e32 v{{[0-9]+}}, 0xc1dd067c
; VI: v_not_b32_e32 v{{[0-9]+}}, 0.15915494
define void @materialize_not_inv2pi_i32(ptr addrspace(1) %out) {
store i32 -1042479492, ptr addrspace(1) %out
ret void
}
; GCN-LABEL: {{^}}materialize_not_neg_inv2pi_i32:
; GCN: v_mov_b32_e32 v{{[0-9]+}}, 0x41dd067c
define void @materialize_not_neg_inv2pi_i32(ptr addrspace(1) %out) {
store i32 1105004156, ptr addrspace(1) %out
ret void
}
; One constant is reversible, the other is not. We shouldn't break
; vopd packing for this.
; GFX11-LABEL: {{^}}vopd_materialize:
; FIXME-GFX11: v_dual_mov_b32 v0, 0x102 :: v_dual_mov_b32 v1, 1.0
; GFX11: v_bfrev_b32_e32 v0, 4.0
; GFX11: v_mov_b32_e32 v1, 1.0
define <2 x i32> @vopd_materialize() {
%insert0 = insertelement <2 x i32> poison, i32 258, i32 0
%insert1 = insertelement <2 x i32> %insert0, i32 1065353216, i32 1
ret <2 x i32> %insert1
}
|
