File: atomic-cmpxchg-flag.ll

package info (click to toggle)
llvm-toolchain-19 1%3A19.1.7-3~deb12u1
  • links: PTS, VCS
  • area: main
  • in suites: bookworm-proposed-updates
  • size: 1,998,492 kB
  • sloc: cpp: 6,951,680; ansic: 1,486,157; asm: 913,598; python: 232,024; f90: 80,126; objc: 75,281; lisp: 37,276; pascal: 16,990; sh: 10,009; ml: 5,058; perl: 4,724; awk: 3,523; makefile: 3,167; javascript: 2,504; xml: 892; fortran: 664; cs: 573
file content (29 lines) | stat: -rw-r--r-- 1,144 bytes parent folder | download | duplicates (10) 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
 
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=riscv64 -mattr=+a -verify-machineinstrs < %s \
; RUN:   | FileCheck -check-prefix=RV64IA %s

; This test ensures that the output of the 'lr.w' instruction is sign-extended.
; Previously, the default zero-extension was being used and 'cmp' parameter
; higher bits were masked to zero for the comparison.

define i1 @cmpxchg_i32_seq_cst_seq_cst(ptr %ptr, i32 signext %cmp,
; RV64IA-LABEL: cmpxchg_i32_seq_cst_seq_cst:
; RV64IA:       # %bb.0: # %entry
; RV64IA-NEXT:  .LBB0_1: # %entry
; RV64IA-NEXT:    # =>This Inner Loop Header: Depth=1
; RV64IA-NEXT:    lr.w.aqrl a3, (a0)
; RV64IA-NEXT:    bne a3, a1, .LBB0_3
; RV64IA-NEXT:  # %bb.2: # %entry
; RV64IA-NEXT:    # in Loop: Header=BB0_1 Depth=1
; RV64IA-NEXT:    sc.w.rl a4, a2, (a0)
; RV64IA-NEXT:    bnez a4, .LBB0_1
; RV64IA-NEXT:  .LBB0_3: # %entry
; RV64IA-NEXT:    xor a1, a3, a1
; RV64IA-NEXT:    seqz a0, a1
; RV64IA-NEXT:    ret
        i32 signext %val) nounwind {
entry:
  %0 = cmpxchg ptr %ptr, i32 %cmp, i32 %val seq_cst seq_cst
  %1 = extractvalue { i32, i1 } %0, 1
  ret i1 %1
}