File: alloc-all-regs-reserved-in-class.mir

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llvm-toolchain-20 1%3A20.1.6-1~exp1
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# RUN: not llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -run-pass=greedy -verify-machineinstrs -filetype=null %s 2>&1 | FileCheck --implicit-check-not=error %s

# Check that there isn't an assert if we try to allocate a virtual register from
# a class where all registers are reserved. All AGPRs are reserved on subtargets
# that do not have them.

# CHECK: error: <unknown>:0:0: no registers from class available to allocate in function 'use_agpr'

---
name: use_agpr
tracksRegLiveness: true
body:             |
  bb.0:
    %0:agpr_32 = IMPLICIT_DEF
    S_ENDPGM 0, implicit %0
...