File: extload-align.ll

package info (click to toggle)
llvm-toolchain-20 1%3A20.1.6-1~exp1
  • links: PTS, VCS
  • area: main
  • in suites: experimental
  • size: 2,111,304 kB
  • sloc: cpp: 7,438,677; ansic: 1,393,822; asm: 1,012,926; python: 241,650; f90: 86,635; objc: 75,479; lisp: 42,144; pascal: 17,286; sh: 10,027; ml: 5,082; perl: 4,730; awk: 3,523; makefile: 3,349; javascript: 2,251; xml: 892; fortran: 672
file content (23 lines) | stat: -rw-r--r-- 1,048 bytes parent folder | download | duplicates (6) 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
 
; RUN: llc -debug-only=machine-scheduler -mtriple=amdgcn-- -verify-machineinstrs %s -o - 2>&1| FileCheck -check-prefix=DEBUG %s
target datalayout = "A5"
; REQUIRES: asserts

; Verify that the extload generated from %eval has the default
; alignment size (2) corresponding to the underlying memory size (i16)
; size and not 4 corresponding to the sign-extended size (i32).

; DEBUG: {{^}}# Machine code for function extload_align:
; DEBUG: (volatile load (s16) from %ir.a, addrspace 5)
; DEBUG: {{^}}# End machine code for function extload_align.

define amdgpu_kernel void @extload_align(ptr addrspace(5) %out, i32 %index) #0 {
  %v0 = alloca [4 x i16], addrspace(5)
  %a2 = getelementptr inbounds [4 x i16], ptr addrspace(5) %v0, i32 0, i32 1
  store volatile i16 0, ptr addrspace(5) %v0
  store volatile i16 1, ptr addrspace(5) %a2
  %a = getelementptr inbounds [4 x i16], ptr addrspace(5) %v0, i32 0, i32 %index
  %val = load volatile i16, ptr addrspace(5) %a
  %eval = sext i16 %val to i32
  store i32 %eval, ptr addrspace(5) %out
  ret void
}