File: extload-private.ll

package info (click to toggle)
llvm-toolchain-20 1%3A20.1.6-1~exp1
  • links: PTS, VCS
  • area: main
  • in suites: experimental
  • size: 2,111,304 kB
  • sloc: cpp: 7,438,677; ansic: 1,393,822; asm: 1,012,926; python: 241,650; f90: 86,635; objc: 75,479; lisp: 42,144; pascal: 17,286; sh: 10,027; ml: 5,082; perl: 4,730; awk: 3,523; makefile: 3,349; javascript: 2,251; xml: 892; fortran: 672
file content (46 lines) | stat: -rw-r--r-- 1,709 bytes parent folder | download | duplicates (8)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
; RUN: llc -mtriple=amdgcn -mattr=-promote-alloca -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; RUN: llc -mtriple=amdgcn -mcpu=tonga -mattr=-promote-alloca -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s

; FUNC-LABEL: {{^}}load_i8_sext_private:
; SI: buffer_load_sbyte v{{[0-9]+}}, off, s[{{[0-9]+:[0-9]+}}], 0{{$}}
define amdgpu_kernel void @load_i8_sext_private(ptr addrspace(1) %out) {
entry:
  %tmp0 = alloca i8, addrspace(5)
  %tmp1 = load i8, ptr addrspace(5) %tmp0
  %tmp2 = sext i8 %tmp1 to i32
  store i32 %tmp2, ptr addrspace(1) %out
  ret void
}

; FUNC-LABEL: {{^}}load_i8_zext_private:
; SI: buffer_load_ubyte v{{[0-9]+}}, off, s[{{[0-9]+:[0-9]+}}], 0{{$}}
define amdgpu_kernel void @load_i8_zext_private(ptr addrspace(1) %out) {
entry:
  %tmp0 = alloca i8, addrspace(5)
  %tmp1 = load i8, ptr addrspace(5) %tmp0
  %tmp2 = zext i8 %tmp1 to i32
  store i32 %tmp2, ptr addrspace(1) %out
  ret void
}

; FUNC-LABEL: {{^}}load_i16_sext_private:
; SI: buffer_load_sshort v{{[0-9]+}}, off, s[{{[0-9]+:[0-9]+}}], 0{{$}}
define amdgpu_kernel void @load_i16_sext_private(ptr addrspace(1) %out) {
entry:
  %tmp0 = alloca i16, addrspace(5)
  %tmp1 = load i16, ptr addrspace(5) %tmp0
  %tmp2 = sext i16 %tmp1 to i32
  store i32 %tmp2, ptr addrspace(1) %out
  ret void
}

; FUNC-LABEL: {{^}}load_i16_zext_private:
; SI: buffer_load_ushort v{{[0-9]+}}, off, s[{{[0-9]+:[0-9]+}}], 0 glc{{$}}
define amdgpu_kernel void @load_i16_zext_private(ptr addrspace(1) %out) {
entry:
  %tmp0 = alloca i16, addrspace(5)
  %tmp1 = load volatile i16, ptr addrspace(5) %tmp0
  %tmp2 = zext i16 %tmp1 to i32
  store i32 %tmp2, ptr addrspace(1) %out
  ret void
}