File: reduce-build-vec-ext-to-ext-build-vec.ll

package info (click to toggle)
llvm-toolchain-20 1%3A20.1.6-1~exp1
  • links: PTS, VCS
  • area: main
  • in suites: experimental
  • size: 2,111,304 kB
  • sloc: cpp: 7,438,677; ansic: 1,393,822; asm: 1,012,926; python: 241,650; f90: 86,635; objc: 75,479; lisp: 42,144; pascal: 17,286; sh: 10,027; ml: 5,082; perl: 4,730; awk: 3,523; makefile: 3,349; javascript: 2,251; xml: 892; fortran: 672
file content (20 lines) | stat: -rw-r--r-- 761 bytes parent folder | download | duplicates (9) 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
 
; RUN: llc -mtriple=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,GFX9 %s

; Make sure reduceBuildVecExtToExtBuildVec combine doesn't regress

; code with legal v4i16. The v4i16 build_vector it produces will be
; custom lowered into an i32 based build_vector, producing a mess that
; nothing manages to put back together.

; GCN-LABEL: {{^}}v2i16_to_i64:
; GFX9: s_waitcnt
; GFX9-NEXT: v_pk_add_u16 v1, v0, v1
; GFX9-NEXT: v_and_b32_e32 v0, 0xffff, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; GFX9-NEXT: s_setpc_b64
define i64 @v2i16_to_i64(<2 x i16> %x, <2 x i16> %y) {
  %x.add = add <2 x i16> %x, %y
  %zext = zext <2 x i16> %x.add to <2 x i32>
  %arst = bitcast <2 x i32> %zext to i64
  ret i64 %arst
}