File: select-fabs-fneg-extract.legal.f16.ll

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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=amdgcn -mcpu=fiji < %s | FileCheck -check-prefixes=VI %s

; FIXME: This one should fold to rcp
define half @select_fneg_posk_src_rcp_f16(i32 %c, half %x, half %y) {
; VI-LABEL: select_fneg_posk_src_rcp_f16:
; VI:       ; %bb.0:
; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT:    v_rcp_f16_e64 v1, -v1
; VI-NEXT:    v_mov_b32_e32 v2, 0x4000
; VI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v0
; VI-NEXT:    v_cndmask_b32_e32 v0, v2, v1, vcc
; VI-NEXT:    s_setpc_b64 s[30:31]
  %cmp = icmp eq i32 %c, 0
  %rcp = call half @llvm.amdgcn.rcp.f16(half %x)
  %fneg = fneg half %rcp
  %select = select i1 %cmp, half %fneg, half 2.0
  ret half %select
}

declare half @llvm.amdgcn.rcp.f16(half) #0

attributes #0 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }