File: smrd_vmem_war.ll

package info (click to toggle)
llvm-toolchain-20 1%3A20.1.6-1~exp1
  • links: PTS, VCS
  • area: main
  • in suites: experimental
  • size: 2,111,304 kB
  • sloc: cpp: 7,438,677; ansic: 1,393,822; asm: 1,012,926; python: 241,650; f90: 86,635; objc: 75,479; lisp: 42,144; pascal: 17,286; sh: 10,027; ml: 5,082; perl: 4,730; awk: 3,523; makefile: 3,349; javascript: 2,251; xml: 892; fortran: 672
file content (29 lines) | stat: -rw-r--r-- 1,057 bytes parent folder | download | duplicates (13) 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
 
; RUN: llc  -mtriple=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck %s -check-prefix=GCN

; GCN-LABEL: ; %bb.0:
; GCN: s_load_dword s{{[0-9]+}}, s[[[ADDR_LO:[0-9]+]]{{\:}}[[ADDR_HI:[0-9]+]]], 0x0
; GCN: s_waitcnt lgkmcnt(0)
; GCN: global_store_dword v

define amdgpu_kernel void @zot(ptr addrspace(1) nocapture %arg, ptr addrspace(1) nocapture %arg1) {
bb:
  %tmp = call i32 @llvm.amdgcn.workitem.id.x()
  %tmp2 = icmp eq i32 %tmp, 0
  br i1 %tmp2, label %bb3, label %bb8

bb3:                                              ; preds = %bb
  %tmp4 = load i32, ptr addrspace(1) %arg, align 4
  store i32 0, ptr addrspace(1) %arg, align 4
  %tmp5 = zext i32 %tmp4 to i64
  %tmp6 = load i64, ptr addrspace(1) %arg1, align 8
  %tmp7 = add i64 %tmp6, %tmp5
  store i64 %tmp7, ptr addrspace(1) %arg1, align 8
  br label %bb8

bb8:                                              ; preds = %bb3, %bb
  ret void
}
; Function Attrs: nounwind readnone speculatable
declare i32 @llvm.amdgcn.workitem.id.x() #0

attributes #0 = { nounwind readnone speculatable }