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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs < %s | FileCheck %s
define <2 x i64> @expanded_fixed_neg_abs64(<2 x i64> %x) {
; CHECK-LABEL: expanded_fixed_neg_abs64:
; CHECK: # %bb.0:
; CHECK-NEXT: vsetivli zero, 2, e64, m1, ta, ma
; CHECK-NEXT: vrsub.vi v9, v8, 0
; CHECK-NEXT: vmin.vv v8, v8, v9
; CHECK-NEXT: ret
%t = sub <2 x i64> <i64 0, i64 0>, %x
%t1 = call <2 x i64> @llvm.smax.v2i64(<2 x i64> %t, <2 x i64> %x)
%t2 = sub <2 x i64> <i64 0, i64 0>, %t1
ret <2 x i64> %t2
}
define <2 x i64> @expanded_fixed_neg_abs64_unsigned(<2 x i64> %x) {
; CHECK-LABEL: expanded_fixed_neg_abs64_unsigned:
; CHECK: # %bb.0:
; CHECK-NEXT: vsetivli zero, 2, e64, m1, ta, ma
; CHECK-NEXT: vrsub.vi v9, v8, 0
; CHECK-NEXT: vminu.vv v8, v8, v9
; CHECK-NEXT: ret
%t = sub <2 x i64> <i64 0, i64 0>, %x
%t1 = call <2 x i64> @llvm.umax.v2i64(<2 x i64> %t, <2 x i64> %x)
%t2 = sub <2 x i64> <i64 0, i64 0>, %t1
ret <2 x i64> %t2
}
define <2 x i64> @expanded_fixed_neg_inv_abs64(<2 x i64> %x) {
; CHECK-LABEL: expanded_fixed_neg_inv_abs64:
; CHECK: # %bb.0:
; CHECK-NEXT: vsetivli zero, 2, e64, m1, ta, ma
; CHECK-NEXT: vrsub.vi v9, v8, 0
; CHECK-NEXT: vmax.vv v8, v8, v9
; CHECK-NEXT: ret
%t = sub <2 x i64> <i64 0, i64 0>, %x
%t1 = call <2 x i64> @llvm.smin.v2i64(<2 x i64> %t, <2 x i64> %x)
%t2 = sub <2 x i64> <i64 0, i64 0>, %t1
ret <2 x i64> %t2
}
define <2 x i64> @expanded_fixed_neg_inv_abs64_unsigned(<2 x i64> %x) {
; CHECK-LABEL: expanded_fixed_neg_inv_abs64_unsigned:
; CHECK: # %bb.0:
; CHECK-NEXT: vsetivli zero, 2, e64, m1, ta, ma
; CHECK-NEXT: vrsub.vi v9, v8, 0
; CHECK-NEXT: vmaxu.vv v8, v8, v9
; CHECK-NEXT: ret
%t = sub <2 x i64> <i64 0, i64 0>, %x
%t1 = call <2 x i64> @llvm.umin.v2i64(<2 x i64> %t, <2 x i64> %x)
%t2 = sub <2 x i64> <i64 0, i64 0>, %t1
ret <2 x i64> %t2
}
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